Searched refs:lane1 (Results 1 – 8 of 8) sorted by relevance
73 analogix,lane1-swing:78 an array of swing register setting for DP tx lane1 PHY.79 DP TX lane1 swing register setting same with lane0151 analogix,lane1-swing = /bits/ 8 <0x14 0x54 0x64 0x74>;
25 Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for
88 - lane1
243 uint8_t lane1:2; /* Mapping for lane 1 */ member
103 /* bifurcation; lane1 when using 1+1 */
188 phy-names = "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy",
521 phy-names = "cp1-pcie0-x2-lane0-phy", "cp1-pcie0-x2-lane1-phy";
656 reset-names = "lane1";
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