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Searched refs:md_reg (Results 1 – 10 of 10) sorted by relevance

/linux-6.3-rc2/drivers/clk/qcom/
A Dgcc-msm8660.c106 .md_reg = 0x29d0,
157 .md_reg = 0x29f0,
208 .md_reg = 0x2a10,
259 .md_reg = 0x2a30,
310 .md_reg = 0x2a50,
361 .md_reg = 0x2a70,
412 .md_reg = 0x2a90,
463 .md_reg = 0x2ab0,
514 .md_reg = 0x2ad0,
565 .md_reg = 0x2af0,
[all …]
A Dgcc-mdm9615.c186 .md_reg = 0x29d0,
237 .md_reg = 0x29f0,
288 .md_reg = 0x2a10,
339 .md_reg = 0x2a30,
390 .md_reg = 0x2a50,
453 .md_reg = 0x29c8,
502 .md_reg = 0x29e8,
551 .md_reg = 0x2a08,
600 .md_reg = 0x2a28,
649 .md_reg = 0x2a48,
[all …]
A Dgcc-ipq806x.c413 .md_reg = 0x29d0,
464 .md_reg = 0x29f0,
515 .md_reg = 0x2a30,
566 .md_reg = 0x2a50,
617 .md_reg = 0x2a70,
668 .md_reg = 0x2a90,
732 .md_reg = 0x29c8,
783 .md_reg = 0x29e8,
834 .md_reg = 0x2a28,
885 .md_reg = 0x2a48,
[all …]
A Dgcc-msm8960.c350 .md_reg = 0x29d0,
401 .md_reg = 0x29f0,
452 .md_reg = 0x2a10,
503 .md_reg = 0x2a30,
554 .md_reg = 0x2a50,
605 .md_reg = 0x2a70,
656 .md_reg = 0x2a90,
707 .md_reg = 0x2ab0,
758 .md_reg = 0x2ad0,
809 .md_reg = 0x2af0,
[all …]
A Dmmcc-msm8960.c175 .md_reg = 0x0144,
226 .md_reg = 0x0158,
277 .md_reg = 0x0224,
335 .md_reg = 0x0044,
403 .md_reg = 0x0028,
471 .md_reg = 0x022c,
726 .md_reg = 0x0164,
1169 .md_reg = 0x009c,
1471 .md_reg = 0x00f0,
2116 .md_reg = 0x0050,
[all …]
A Dlcc-ipq806x.c113 .md_reg = 0x4c,
230 .md_reg = 0x58,
314 .md_reg = 0xd0,
371 .md_reg = 0x3c,
A Dclk-rcg.c206 u32 md_reg, ns_reg; in configure_bank() local
226 md_reg = rcg->md_reg[new_bank]; in configure_bank()
233 ret = regmap_read(rcg->clkr.regmap, md_reg, &md); in configure_bank()
237 ret = regmap_write(rcg->clkr.regmap, md_reg, md); in configure_bank()
306 regmap_read(rcg->clkr.regmap, rcg->md_reg[bank], &md); in clk_dyn_rcg_set_parent()
352 regmap_read(rcg->clkr.regmap, rcg->md_reg, &md); in clk_rcg_recalc_rate()
384 regmap_read(rcg->clkr.regmap, rcg->md_reg[bank], &md); in clk_dyn_rcg_recalc_rate()
490 regmap_read(rcg->clkr.regmap, rcg->md_reg, &md); in __clk_rcg_set_rate()
492 regmap_write(rcg->clkr.regmap, rcg->md_reg, md); in __clk_rcg_set_rate()
A Dclk-rcg.h77 u32 md_reg; member
113 u32 md_reg[2]; member
A Dlcc-mdm9615.c93 .md_reg = 0x4c,
199 .md_reg = _md, \
343 .md_reg = 0x58,
411 .md_reg = 0xd0,
A Dlcc-msm8960.c94 .md_reg = _md, \
256 .md_reg = 0x58,
326 .md_reg = 0xd0,

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