Home
last modified time | relevance | path

Searched refs:min_sclk (Results 1 – 11 of 11) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dsmu10_hwmgr.c628 uint32_t min_sclk = hwmgr->display_config->min_core_set_clock; in smu10_dpm_force_dpm_level() local
639 if (min_sclk < data->gfx_min_freq_limit) in smu10_dpm_force_dpm_level()
640 min_sclk = data->gfx_min_freq_limit; in smu10_dpm_force_dpm_level()
642 min_sclk /= 100; /* transfer 10KHz to MHz */ in smu10_dpm_force_dpm_level()
702 min_sclk, in smu10_dpm_force_dpm_level()
706 min_sclk, in smu10_dpm_force_dpm_level()
781 min_sclk, in smu10_dpm_force_dpm_level()
A Dvega12_hwmgr.c794 hwmgr->default_compute_power_profile.min_sclk =
2657 uint32_t min_sclk, uint32_t min_mclk)
2665 dpm_table->gfx_table.dpm_levels[i].value >= min_sclk) {
/linux-6.3-rc2/drivers/gpu/drm/radeon/
A Dtrinity_dpm.h79 u32 min_sclk; member
A Dsumo_dpm.h83 u32 min_sclk; member
A Dtrinity_dpm.c1359 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in trinity_patch_thermal_state()
1498 u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */ in trinity_apply_state_adjust_rules() local
1499 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in trinity_apply_state_adjust_rules()
1522 if (ps->levels[i].sclk < min_sclk) in trinity_apply_state_adjust_rules()
1524 trinity_get_valid_engine_clock(rdev, min_sclk); in trinity_apply_state_adjust_rules()
1822 pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_7.ulMinEngineClock); in trinity_parse_sys_info_table()
A Dsumo_dpm.c1047 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in sumo_patch_thermal_state()
1094 u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */ in sumo_apply_state_adjust_rules() local
1095 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in sumo_apply_state_adjust_rules()
1115 if (ps->levels[i].sclk < min_sclk) in sumo_apply_state_adjust_rules()
1117 sumo_get_valid_engine_clock(rdev, min_sclk); in sumo_apply_state_adjust_rules()
1675 pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_6.ulMinEngineClock); in sumo_parse_sys_info_table()
A Dni_dpm.c2460 u32 min_sclk; in ni_populate_power_containment_values() local
2511 min_sclk = max_sclk; in ni_populate_power_containment_values()
2513 min_sclk = prev_sclk; in ni_populate_power_containment_values()
2515 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in ni_populate_power_containment_values()
2517 if (min_sclk < state->performance_levels[0].sclk) in ni_populate_power_containment_values()
2518 min_sclk = state->performance_levels[0].sclk; in ni_populate_power_containment_values()
2520 if (min_sclk == 0) in ni_populate_power_containment_values()
2524 (u8)((NISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in ni_populate_power_containment_values()
A Dsi_dpm.c2276 u32 min_sclk; in si_populate_power_containment_values() local
2316 min_sclk = max_sclk; in si_populate_power_containment_values()
2318 min_sclk = prev_sclk; in si_populate_power_containment_values()
2320 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in si_populate_power_containment_values()
2323 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()
2324 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()
2326 if (min_sclk == 0) in si_populate_power_containment_values()
2350 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values()
A Dkv_dpm.c1941 u32 min_sclk = 10000; /* ??? */ in kv_apply_state_adjust_rules() local
1960 sclk = min_sclk; in kv_apply_state_adjust_rules()
/linux-6.3-rc2/drivers/gpu/drm/amd/pm/legacy-dpm/
A Dsi_dpm.c2390 u32 min_sclk; in si_populate_power_containment_values() local
2430 min_sclk = max_sclk; in si_populate_power_containment_values()
2432 min_sclk = prev_sclk; in si_populate_power_containment_values()
2434 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in si_populate_power_containment_values()
2436 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()
2437 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()
2439 if (min_sclk == 0) in si_populate_power_containment_values()
2463 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values()
A Dkv_dpm.c2213 u32 min_sclk = 10000; /* ??? */ in kv_apply_state_adjust_rules() local
2232 sclk = min_sclk; in kv_apply_state_adjust_rules()

Completed in 67 milliseconds