Home
last modified time | relevance | path

Searched refs:num_se (Results 1 – 11 of 11) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dvega10_powertune.c914 uint32_t num_se = 0, count, data; in vega10_enable_cac_driving_se_didt_config() local
916 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_cac_driving_se_didt_config()
921 for (count = 0; count < num_se; count++) { in vega10_enable_cac_driving_se_didt_config()
965 uint32_t num_se = 0, count, data; in vega10_enable_psm_gc_didt_config() local
967 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_psm_gc_didt_config()
972 for (count = 0; count < num_se; count++) { in vega10_enable_psm_gc_didt_config()
1026 uint32_t num_se = 0, count, data; in vega10_enable_se_edc_config() local
1028 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_se_edc_config()
1033 for (count = 0; count < num_se; count++) { in vega10_enable_se_edc_config()
1073 uint32_t num_se = 0; in vega10_enable_psm_gc_edc_config() local
[all …]
A Dsmu7_powertune.c964 uint32_t num_se = 0; in smu7_enable_didt_config() local
969 num_se = adev->gfx.config.max_shader_engines; in smu7_enable_didt_config()
980 for (count = 0; count < num_se; count++) { in smu7_enable_didt_config()
/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Dgfx_v6_0.c1364 unsigned num_se = max_t(unsigned, adev->gfx.config.max_shader_engines, 1); in gfx_v6_0_write_harvested_raster_configs() local
1365 unsigned rb_per_pkr = min_t(unsigned, num_rb / num_se / sh_per_se, 2); in gfx_v6_0_write_harvested_raster_configs()
1366 unsigned rb_per_se = num_rb / num_se; in gfx_v6_0_write_harvested_raster_configs()
1375 WARN_ON(!(num_se == 1 || num_se == 2 || num_se == 4)); in gfx_v6_0_write_harvested_raster_configs()
1379 for (se = 0; se < num_se; se++) { in gfx_v6_0_write_harvested_raster_configs()
1385 if ((num_se > 1) && (!se_mask[idx] || !se_mask[idx + 1])) { in gfx_v6_0_write_harvested_raster_configs()
A Dgfx_v7_0.c1641 unsigned num_se = max_t(unsigned, adev->gfx.config.max_shader_engines, 1); in gfx_v7_0_write_harvested_raster_configs() local
1642 unsigned rb_per_pkr = min_t(unsigned, num_rb / num_se / sh_per_se, 2); in gfx_v7_0_write_harvested_raster_configs()
1643 unsigned rb_per_se = num_rb / num_se; in gfx_v7_0_write_harvested_raster_configs()
1652 WARN_ON(!(num_se == 1 || num_se == 2 || num_se == 4)); in gfx_v7_0_write_harvested_raster_configs()
1656 if ((num_se > 2) && ((!se_mask[0] && !se_mask[1]) || in gfx_v7_0_write_harvested_raster_configs()
1669 for (se = 0; se < num_se; se++) { in gfx_v7_0_write_harvested_raster_configs()
1675 if ((num_se > 1) && (!se_mask[idx] || !se_mask[idx + 1])) { in gfx_v7_0_write_harvested_raster_configs()
A Damdgpu_gfx.h132 uint8_t num_se; member
A Dgfx_v8_0.c3487 unsigned num_se = max_t(unsigned, adev->gfx.config.max_shader_engines, 1); in gfx_v8_0_write_harvested_raster_configs() local
3488 unsigned rb_per_pkr = min_t(unsigned, num_rb / num_se / sh_per_se, 2); in gfx_v8_0_write_harvested_raster_configs()
3489 unsigned rb_per_se = num_rb / num_se; in gfx_v8_0_write_harvested_raster_configs()
3498 WARN_ON(!(num_se == 1 || num_se == 2 || num_se == 4)); in gfx_v8_0_write_harvested_raster_configs()
3502 if ((num_se > 2) && ((!se_mask[0] && !se_mask[1]) || in gfx_v8_0_write_harvested_raster_configs()
3515 for (se = 0; se < num_se; se++) { in gfx_v8_0_write_harvested_raster_configs()
3521 if ((num_se > 1) && (!se_mask[idx] || !se_mask[idx + 1])) { in gfx_v8_0_write_harvested_raster_configs()
A Damdgpu_display.c794 rb = ilog2(adev->gfx.config.gb_addr_config_fields.num_se) + in convert_tiling_flags_to_modifier()
797 ilog2(adev->gfx.config.gb_addr_config_fields.num_se)); in convert_tiling_flags_to_modifier()
A Dgfx_v9_0.c1965 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v9_0_gpu_early_init()
A Dgfx_v11_0.c4292 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in get_gb_addr_config()
A Dgfx_v10_0.c4436 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v10_0_gpu_early_init()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_plane.c218 adev->gfx.config.gb_addr_config_fields.num_se; in fill_gfx9_tiling_info_from_device()
402 ilog2(adev->gfx.config.gb_addr_config_fields.num_se)); in add_gfx9_modifiers()
405 int rb = ilog2(adev->gfx.config.gb_addr_config_fields.num_se) + in add_gfx9_modifiers()

Completed in 72 milliseconds