/linux-6.3-rc2/drivers/net/phy/ |
A D | phy-c45.c | 40 stat1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1); in genphy_c45_pma_can_sleep() 360 ret = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in genphy_c45_check_and_restart_aneg() 394 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in genphy_c45_aneg_done() 415 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in genphy_c45_read_link() 438 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link() 445 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link() 519 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in genphy_c45_read_lpa() 644 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in genphy_c45_read_mdix() 956 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in genphy_c45_pma_read_abilities() 1242 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, in genphy_c45_plca_set_cfg() [all …]
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A D | bcm87xx.c | 60 val = phy_read_mmd(phydev, devid, reg); in bcm87xx_of_reg_init() 106 rx_signal_detect = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in bcm87xx_read_status() 114 pcs_status = phy_read_mmd(phydev, MDIO_MMD_PCS, in bcm87xx_read_status() 122 xgxs_lane_status = phy_read_mmd(phydev, MDIO_MMD_PHYXS, in bcm87xx_read_status() 144 reg = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_CONTROL); in bcm87xx_config_intr() 150 err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS); in bcm87xx_config_intr() 164 err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS); in bcm87xx_config_intr()
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A D | bcm84881.c | 117 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in bcm84881_aneg_done() 121 bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR); in bcm84881_aneg_done() 134 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in bcm84881_read_status() 143 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in bcm84881_read_status() 147 bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR); in bcm84881_read_status() 173 val = phy_read_mmd(phydev, MDIO_MMD_AN, in bcm84881_read_status() 197 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, 0x4011); in bcm84881_read_status()
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A D | teranetics.c | 39 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) in teranetics_aneg_done() 54 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) { in teranetics_read_status() 55 reg = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT); in teranetics_read_status() 62 reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in teranetics_read_status()
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A D | aquantia_main.c | 202 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg); in aqr107_get_stat() 208 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1); in aqr107_get_stat() 328 irq_status = phy_read_mmd(phydev, MDIO_MMD_AN, in aqr_handle_interrupt() 348 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1); in aqr_read_status() 368 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_STATUS1); in aqr107_read_rate() 407 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, config_reg); in aqr107_read_rate() 473 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_VEND_PROV); in aqr107_get_downshift() 545 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID); in aqr107_chip_info() 620 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1); in aqr107_link_change_notify() 628 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT4); in aqr107_link_change_notify() [all …]
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A D | marvell10g.c | 188 return phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP); in mv3310_hwmon_read_temp_reg() 193 return phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_TEMP); in mv2110_hwmon_read_temp_reg() 362 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC1); in mv3310_get_downshift() 423 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_CSCR1); in mv3310_get_edpd() 506 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_BOOT); in mv3310_probe() 522 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_FW_VER0); in mv3310_probe() 827 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in mv3310_get_features() 982 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in mv3310_read_status_copper() 986 cssr1 = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_CSSR1); in mv3310_read_status_copper() 1039 val = phy_read_mmd(phydev, MDIO_MMD_AN, MV_AN_STAT1000); in mv3310_read_status_copper() [all …]
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A D | nxp-c45-tja11xx.c | 251 ts->tv_nsec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64() 253 ts->tv_nsec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64() 255 ts->tv_sec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64() 257 ts->tv_sec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64() 371 extts->tv_nsec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in nxp_c45_get_extts() 373 extts->tv_nsec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in nxp_c45_get_extts() 375 extts->tv_sec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in nxp_c45_get_extts() 377 extts->tv_sec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in nxp_c45_get_extts() 402 hwts->nsec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in nxp_c45_get_hwtxts() 857 ret = phy_read_mmd(phydev, nxp_c45_hw_stats[i].mmd, in nxp_c45_get_stats() [all …]
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A D | dp83td510.c | 97 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PHY_STS); in dp83td510_handle_interrupt() 106 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_INTERRUPT_REG_1); in dp83td510_handle_interrupt() 153 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, in dp83td510_read_status() 196 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_MSE_DETECT); in dp83td510_get_sqi()
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A D | dp83tc811.c | 120 value = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol() 166 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG); in dp83811_get_wol() 172 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol() 177 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol() 182 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol() 369 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG); in dp83811_suspend()
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A D | dp83867.c | 189 val_rxcfg = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG); in dp83867_set_wol() 257 value = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG); in dp83867_get_wol() 269 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol() 274 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol() 279 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol() 491 const u16 val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_verify_rgmii_cfg() 674 delay = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIIDCTL); in dp83867_of_init() 731 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS2); in dp83867_config_init() 781 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS1); in dp83867_config_init() 796 val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL); in dp83867_config_init() [all …]
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A D | dp83822.c | 146 value = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol() 191 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_get_wol() 197 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol() 202 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol() 207 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol() 525 val = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_SOR1); in dp83822_read_straps() 574 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_suspend() 588 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_resume()
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A D | adin1100.c | 78 ret = phy_read_mmd(phydev, MDIO_MMD_AN, ADIN_AN_PHY_INST_STATUS); in adin_read_status() 196 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10T1L_STAT); in adin_get_features() 230 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1); in adin_get_sqi() 236 ret = phy_read_mmd(phydev, MDIO_STAT1, ADIN_MSE_VAL); in adin_get_sqi()
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A D | marvell-88x2222.c | 310 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); in mv2222_aneg_done() 318 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT); in mv2222_aneg_done() 331 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); in mv2222_read_status_10g() 367 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT); in mv2222_read_status_1g() 393 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_PHY_STAT); in mv2222_read_status_1g() 419 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_RX_SIGNAL_DETECT); in mv2222_link_is_operational()
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A D | adin.c | 264 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RGMII_CFG_REG); in adin_config_rgmii_mode() 310 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RMII_CFG_REG); in adin_config_rmii_mode() 736 rc = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_soft_reset() 763 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg1); in adin_read_mmd_stat_regs() 772 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg2); in adin_read_mmd_stat_regs() 880 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_cable_test_report_pair() 891 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_cable_test_report_pair() 927 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_CDIAG_RUN); in adin_cable_test_get_status()
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A D | dp83869.c | 253 val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG); in dp83869_set_wol() 349 value = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG); in dp83869_get_wol() 365 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol() 375 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol() 385 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol() 514 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1); in dp83869_set_strapped_mode() 567 ret = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1); in dp83869_of_init() 822 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL); in dp83869_config_init()
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A D | microchip.c | 266 priv->chip_id = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_ID); in lan88xx_probe() 267 priv->chip_rev = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_REV); in lan88xx_probe() 325 val = phy_read_mmd(phydev, MDIO_MMD_PCS, in lan88xx_config_init()
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A D | micrel.c | 936 newval = phy_read_mmd(phydev, 2, reg); in ksz9031_of_load_skew_values() 976 reg = phy_read_mmd(phydev, 0x1C, MII_KSZ9031RN_EDPD); in ksz9031_enable_edpd() 1178 newval = phy_read_mmd(phydev, 2, reg); in ksz9131_of_load_skew_values() 1248 reg = phy_read_mmd(phydev, 2, 0); in ksz9131_led_errata() 3448 phy_read_mmd(phydev, 2, in lan8841_ptp_flush_fifo() 3452 phy_read_mmd(phydev, 2, LAN8841_PTP_INT_STS); in lan8841_ptp_flush_fifo() 3462 status = phy_read_mmd(phydev, 2, LAN8841_PTP_INT_STS); in lan8841_handle_ptp_interrupt() 3713 s = phy_read_mmd(phydev, 2, LAN8841_PTP_LTC_RD_SEC_HI); in lan8841_ptp_gettime64() 3717 s |= phy_read_mmd(phydev, 2, LAN8841_PTP_LTC_RD_SEC_LO); in lan8841_ptp_gettime64() 3721 ns |= phy_read_mmd(phydev, 2, LAN8841_PTP_LTC_RD_NS_LO); in lan8841_ptp_gettime64() [all …]
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A D | aquantia_hwmon.c | 58 int temp = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_get() 84 int val = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_test_bit()
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A D | mxl-gpy.c | 159 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_TEMP_STA); in gpy_hwmon_read() 249 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_MBOX_DATA); in gpy_mbox_read() 360 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL); in gpy_sgmii_aneg_en() 498 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PHY_PMA_MGBT_POLARITY); in gpy_update_mdix() 761 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, VPSPEC2_WOL_CTL); in gpy_get_wol()
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A D | at803x.c | 513 value = phy_read_mmd(phydev, MDIO_MMD_PCS, AT803X_PHY_MMD3_WOL_CTRL); in at803x_get_wol() 544 val = phy_read_mmd(phydev, MDIO_MMD_PCS, stat.reg); in at803x_get_stat() 925 err = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_NG_EXTABLE); in at803x_get_features() 1821 ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); in qca808x_read_status() 1919 val = phy_read_mmd(phydev, MDIO_MMD_PCS, cdt_length_reg); in qca808x_cdt_fault_length() 1982 val = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA808X_MMD3_CDT_STATUS); in qca808x_cable_test_get_status()
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A D | bcm-phy-lib.c | 375 val = phy_read_mmd(phydev, MDIO_MMD_AN, BRCM_CL45VEN_EEE_CONTROL); in bcm_phy_set_eee() 387 val = phy_read_mmd(phydev, MDIO_MMD_AN, BCM_CL45VEN_EEE_ADV); in bcm_phy_set_eee()
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A D | phy-core.c | 584 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) in phy_read_mmd() function 594 EXPORT_SYMBOL(phy_read_mmd);
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A D | phy.c | 1524 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_WK_ERR); in phy_get_eee_err()
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/linux-6.3-rc2/include/linux/ |
A D | phy.h | 1207 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1230 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
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/linux-6.3-rc2/drivers/net/ethernet/realtek/ |
A D | r8169_main.c | 1860 tp->eee_adv = phy_read_mmd(dev->phydev, MDIO_MMD_AN, in rtl8169_set_eee() 1936 adv = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); in rtl_enable_eee()
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