Searched refs:pw_idx (Results 1 – 3 of 3) sorted by relevance
67 #define PUNIT_PWRGT_MASK(pw_idx) (3 << ((pw_idx) * 2)) argument68 #define PUNIT_PWRGT_PWR_ON(pw_idx) (0 << ((pw_idx) * 2)) argument69 #define PUNIT_PWRGT_CLK_GATE(pw_idx) (1 << ((pw_idx) * 2)) argument70 #define PUNIT_PWRGT_RESET(pw_idx) (2 << ((pw_idx) * 2)) argument71 #define PUNIT_PWRGT_PWR_GATE(pw_idx) (3 << ((pw_idx) * 2)) argument
6652 #define HSW_PWR_WELL_CTL_REQ(pw_idx) (0x2 << ((pw_idx) * 2)) argument6653 #define HSW_PWR_WELL_CTL_STATE(pw_idx) (0x1 << ((pw_idx) * 2)) argument6752 #define SKL_PW_CTL_IDX_TO_PG(pw_idx) \ argument6753 ((pw_idx) - SKL_PW_CTL_IDX_PW_1 + SKL_PG1)6758 #define ICL_PW_CTL_IDX_TO_PG(pw_idx) \ argument6759 ((pw_idx) - ICL_PW_CTL_IDX_PW_1 + SKL_PG1)6762 #define _ICL_AUX_REG_IDX(pw_idx) ((pw_idx) - ICL_PW_CTL_IDX_AUX_A) argument6765 #define ICL_AUX_ANAOVRD1(pw_idx) _MMIO(_PICK(_ICL_AUX_REG_IDX(pw_idx), \ argument
199 #define ICL_AUX_PW_TO_CH(pw_idx) \ argument210 ICL_AUX_PW_TO_CH(pw_idx); in icl_aux_pw_to_ch()279 int pw_idx) in hsw_power_well_requesters() argument342 SKL_PW_CTL_IDX_TO_PG(pw_idx); in hsw_power_well_enable()369 SKL_PW_CTL_IDX_TO_PG(pw_idx); in hsw_power_well_enable()418 if (pw_idx >= ICL_PW_CTL_IDX_AUX_A && pw_idx <= ICL_PW_CTL_IDX_AUX_B && in icl_combo_phy_aux_power_well_enable()473 #define TGL_AUX_PW_TO_TC_PORT(pw_idx) ((pw_idx) - TGL_PW_CTL_IDX_AUX_TC1) argument1073 mask = PUNIT_PWRGT_MASK(pw_idx); in vlv_set_power_well()1075 PUNIT_PWRGT_PWR_GATE(pw_idx); in vlv_set_power_well()1123 mask = PUNIT_PWRGT_MASK(pw_idx); in vlv_power_well_enabled()[all …]
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