/linux-6.3-rc2/drivers/clk/mediatek/ |
A D | clk-mt7986-topckgen.c | 88 static const char *const pwm_parents[] __initconst = { variable 188 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x010,
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A D | clk-mt7981-topckgen.c | 142 static const char * const pwm_parents[] __initconst = { variable 305 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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A D | clk-mt6795-topckgen.c | 273 static const char * const pwm_parents[] = { variable 460 TOP_MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x50, 0, 2, 7, 0),
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A D | clk-mt8173-topckgen.c | 66 static const char * const pwm_parents[] = { variable 539 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x0050, 0, 2, 7),
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A D | clk-mt8186-topckgen.c | 243 static const char * const pwm_parents[] = { variable 581 pwm_parents, 0x00b0, 0x00b4, 0x00b8, 0, 2, 7, 0x0004, 28),
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A D | clk-mt2712.c | 249 static const char * const pwm_parents[] = { variable 747 pwm_parents, 0x050, 0, 2, 7), 884 pwm_parents, 0x560, 8, 2, 15),
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A D | clk-mt7629.c | 123 static const char * const pwm_parents[] = { variable 497 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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A D | clk-mt6797.c | 119 static const char * const pwm_parents[] = { variable 335 MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
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A D | clk-mt8516.c | 309 static const char * const pwm_parents[] __initconst = { variable 420 MUX(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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A D | clk-mt7622.c | 146 static const char * const pwm_parents[] = { variable 526 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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A D | clk-mt8195-topckgen.c | 552 static const char * const pwm_parents[] = { variable 1021 pwm_parents, 0x0E0, 0x0E4, 0x0E8, 16, 1, 23, 0x0C, 2),
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A D | clk-mt8167.c | 469 static const char * const pwm_parents[] __initconst = { variable 610 MUX(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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A D | clk-mt2701.c | 177 static const char * const pwm_parents[] = { variable 498 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
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A D | clk-mt6779.c | 610 static const char * const pwm_parents[] = { variable 774 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM, "pwm_sel", pwm_parents,
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A D | clk-mt6765.c | 325 static const char * const pwm_parents[] = { variable 449 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, CLK_CFG_6,
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A D | clk-mt8192.c | 500 static const char * const pwm_parents[] = { variable 676 pwm_parents, 0x0f0, 0x0f4, 0x0f8, 24, 1, 31, 0x008, 28),
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A D | clk-mt8365.c | 278 static const char * const pwm_parents[] = { variable 498 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x0b0,
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/linux-6.3-rc2/drivers/clk/sprd/ |
A D | sc9860-clk.c | 563 static const char * const pwm_parents[] = { "ext-32k", "ext-26m", variable 566 static SPRD_MUX_CLK(pwm0_clk, "pwm0", pwm_parents, 0x248, 568 static SPRD_MUX_CLK(pwm1_clk, "pwm1", pwm_parents, 0x24c, 570 static SPRD_MUX_CLK(pwm2_clk, "pwm2", pwm_parents, 0x250, 572 static SPRD_MUX_CLK(pwm3_clk, "pwm3", pwm_parents, 0x254,
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A D | ums512-clk.c | 765 static const struct clk_parent_data pwm_parents[] = { variable 772 static SPRD_MUX_CLK_DATA(pwm0_clk, "pwm0-clk", pwm_parents, 774 static SPRD_MUX_CLK_DATA(pwm1_clk, "pwm1-clk", pwm_parents, 776 static SPRD_MUX_CLK_DATA(pwm2_clk, "pwm2-clk", pwm_parents, 778 static SPRD_MUX_CLK_DATA(pwm3_clk, "pwm3-clk", pwm_parents,
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A D | sc9863a-clk.c | 365 static const struct clk_parent_data pwm_parents[] = { variable 371 static SPRD_MUX_CLK_DATA(pwm0_clk, "pwm0-clk", pwm_parents, 0x23c, 373 static SPRD_MUX_CLK_DATA(pwm1_clk, "pwm1-clk", pwm_parents, 0x240, 375 static SPRD_MUX_CLK_DATA(pwm2_clk, "pwm2-clk", pwm_parents, 0x244,
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/linux-6.3-rc2/drivers/clk/tegra/ |
A D | clk-tegra20.c | 753 static const char *pwm_parents[] = { "pll_p", "pll_c", "audio", "clk_m", variable 771 …TEGRA_INIT_DATA("pwm", NULL, NULL, pwm_parents, CLK_SOURCE_PWM, 28, 3, 0, 0, 8, 1, 0, 17, TE…
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A D | clk-tegra30.c | 983 static const char *pwm_parents[] = { "pll_p", "pll_c", "clk_32k", "clk_m" }; variable 994 …TEGRA_INIT_DATA("pwm", NULL, NULL, pwm_parents, CLK_SOURCE_PWM, 28, 2, 0, 0, 8, 1, 0, 17, TEGRA_PE…
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