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Searched refs:rFPGA0_XAB_RFInterfaceSW (Results 1 – 8 of 8) sorted by relevance

/linux-6.3-rc2/drivers/staging/rtl8192u/
A Dr819xU_phyreg.h28 #define rFPGA0_XAB_RFInterfaceSW 0x870 macro
A Dr819xU_phy.c549 priv->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
551 priv->PHYRegDef[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; in rtl8192_InitBBRFRegDef()
/linux-6.3-rc2/drivers/staging/rtl8723bs/hal/
A Drtl8723b_phycfg.c311 …pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from… in phy_InitBBRFRegisterDefinition()
312 …pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 MSBs if read 32-bit from… in phy_InitBBRFRegisterDefinition()
A DHalPhyRf_8723B.c1361 rFPGA0_XAB_RFInterfaceSW, in phy_IQCalibrate_8723B()
/linux-6.3-rc2/drivers/staging/rtl8192e/rtl8192e/
A Dr8192E_phyreg.h71 #define rFPGA0_XAB_RFInterfaceSW 0x870 macro
A Dr8192E_phy.c364 priv->phy_reg_def[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; in _rtl92e_init_bb_rf_reg_def()
365 priv->phy_reg_def[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; in _rtl92e_init_bb_rf_reg_def()
/linux-6.3-rc2/drivers/staging/rtl8712/
A Drtl871x_mp_phy_regdef.h115 #define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Ctrl */ macro
/linux-6.3-rc2/drivers/staging/rtl8723bs/include/
A DHal8192CPhyReg.h127 #define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ macro

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