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Searched refs:ras_block (Results 1 – 25 of 44) sorted by relevance

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/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Dmca_v3_0.c60 .ras_block = {
86 .ras_block = {
112 .ras_block = {
132 amdgpu_ras_register_ras_block(adev, &mca->mp0.ras->ras_block); in mca_v3_0_init()
133 amdgpu_ras_register_ras_block(adev, &mca->mp1.ras->ras_block); in mca_v3_0_init()
134 amdgpu_ras_register_ras_block(adev, &mca->mpio.ras->ras_block); in mca_v3_0_init()
135 mca->mp0.ras_if = &mca->mp0.ras->ras_block.ras_comm; in mca_v3_0_init()
136 mca->mp1.ras_if = &mca->mp1.ras->ras_block.ras_comm; in mca_v3_0_init()
137 mca->mpio.ras_if = &mca->mpio.ras->ras_block.ras_comm; in mca_v3_0_init()
A Damdgpu_sdma.c99 struct ras_common_if *ras_block) in amdgpu_sdma_ras_late_init() argument
103 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_sdma_ras_late_init()
107 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_sdma_ras_late_init()
119 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_sdma_ras_late_init()
328 strcpy(ras->ras_block.ras_comm.name, "sdma"); in amdgpu_sdma_ras_sw_init()
329 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__SDMA; in amdgpu_sdma_ras_sw_init()
331 adev->sdma.ras_if = &ras->ras_block.ras_comm; in amdgpu_sdma_ras_sw_init()
334 if (!ras->ras_block.ras_late_init) in amdgpu_sdma_ras_sw_init()
335 ras->ras_block.ras_late_init = amdgpu_sdma_ras_late_init; in amdgpu_sdma_ras_sw_init()
338 if (!ras->ras_block.ras_cb) in amdgpu_sdma_ras_sw_init()
[all …]
A Damdgpu_umc.c91 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_umc_do_page_retirement()
92 adev->umc.ras->ras_block.hw_ops->query_ras_error_count) in amdgpu_umc_do_page_retirement()
93 adev->umc.ras->ras_block.hw_ops->query_ras_error_count(adev, ras_error_status); in amdgpu_umc_do_page_retirement()
95 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_umc_do_page_retirement()
96 adev->umc.ras->ras_block.hw_ops->query_ras_error_address && in amdgpu_umc_do_page_retirement()
112 adev->umc.ras->ras_block.hw_ops->query_ras_error_address(adev, ras_error_status); in amdgpu_umc_do_page_retirement()
211 int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in amdgpu_umc_ras_late_init() argument
215 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_umc_ras_late_init()
219 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_umc_ras_late_init()
233 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_umc_ras_late_init()
A Damdgpu_nbio.c25 int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in amdgpu_nbio_ras_late_init() argument
28 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_nbio_ras_late_init()
32 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_nbio_ras_late_init()
43 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_nbio_ras_late_init()
A Damdgpu_jpeg.c244 amdgpu_ras_register_ras_block(adev, &adev->jpeg.ras->ras_block); in jpeg_set_ras_funcs()
246 strcpy(adev->jpeg.ras->ras_block.ras_comm.name, "jpeg"); in jpeg_set_ras_funcs()
247 adev->jpeg.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__JPEG; in jpeg_set_ras_funcs()
248 adev->jpeg.ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON; in jpeg_set_ras_funcs()
249 adev->jpeg.ras_if = &adev->jpeg.ras->ras_block.ras_comm; in jpeg_set_ras_funcs()
252 if (!adev->jpeg.ras->ras_block.ras_late_init) in jpeg_set_ras_funcs()
253 adev->jpeg.ras->ras_block.ras_late_init = amdgpu_ras_block_late_init; in jpeg_set_ras_funcs()
A Damdgpu_ras.c91 if (!ras_block) in get_ras_block_str()
94 if (ras_block->block >= AMDGPU_RAS_BLOCK_COUNT) in get_ras_block_str()
97 if (ras_block->block == AMDGPU_RAS_BLOCK__MCA) in get_ras_block_str()
100 return ras_block_string[ras_block->block]; in get_ras_block_str()
2613 struct ras_common_if *ras_block) in amdgpu_persistent_edc_harvesting() argument
2616 .head = *ras_block, in amdgpu_persistent_edc_harvesting()
2643 struct ras_common_if *ras_block) in amdgpu_ras_block_late_init() argument
2711 struct ras_common_if *ras_block) in amdgpu_ras_block_late_init_default() argument
2718 struct ras_common_if *ras_block) in amdgpu_ras_block_late_fini() argument
2721 if (!ras_block) in amdgpu_ras_block_late_fini()
[all …]
A Damdgpu_gfx.c681 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_gfx_ras_late_init()
685 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_gfx_ras_late_init()
693 amdgpu_ras_feature_enable_on_boot(adev, ras_block, 0); in amdgpu_gfx_ras_late_init()
698 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_gfx_ras_late_init()
721 strcpy(ras->ras_block.ras_comm.name, "gfx"); in amdgpu_gfx_ras_sw_init()
722 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__GFX; in amdgpu_gfx_ras_sw_init()
724 adev->gfx.ras_if = &ras->ras_block.ras_comm; in amdgpu_gfx_ras_sw_init()
727 if (!ras->ras_block.ras_late_init) in amdgpu_gfx_ras_sw_init()
731 if (!ras->ras_block.ras_cb) in amdgpu_gfx_ras_sw_init()
732 ras->ras_block.ras_cb = amdgpu_gfx_process_ras_data_cb; in amdgpu_gfx_ras_sw_init()
[all …]
A Dgmc_v9_0.c1325 strcpy(adev->umc.ras->ras_block.ras_comm.name, "umc"); in gmc_v9_0_set_umc_funcs()
1328 adev->umc.ras_if = &adev->umc.ras->ras_block.ras_comm; in gmc_v9_0_set_umc_funcs()
1331 if (!adev->umc.ras->ras_block.ras_late_init) in gmc_v9_0_set_umc_funcs()
1335 if (!adev->umc.ras->ras_block.ras_cb) in gmc_v9_0_set_umc_funcs()
1375 strcpy(adev->mmhub.ras->ras_block.ras_comm.name, "mmhub"); in gmc_v9_0_set_mmhub_ras_funcs()
1378 adev->mmhub.ras_if = &adev->mmhub.ras->ras_block.ras_comm; in gmc_v9_0_set_mmhub_ras_funcs()
1391 adev->hdp.ras_if = &adev->hdp.ras->ras_block.ras_comm; in gmc_v9_0_set_hdp_ras_funcs()
1469 if (adev->mmhub.ras && adev->mmhub.ras->ras_block.hw_ops && in gmc_v9_0_late_init()
1470 adev->mmhub.ras->ras_block.hw_ops->reset_ras_error_count) in gmc_v9_0_late_init()
1473 if (adev->hdp.ras && adev->hdp.ras->ras_block.hw_ops && in gmc_v9_0_late_init()
[all …]
A Damdgpu_hdp.h28 struct amdgpu_ras_block_object ras_block; member
46 int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
A Damdgpu_ras.h504 int (*ras_late_init)(struct amdgpu_device *adev, struct ras_common_if *ras_block);
505 void (*ras_fini)(struct amdgpu_device *adev, struct ras_common_if *ras_block);
618 struct ras_common_if *ras_block);
621 struct ras_common_if *ras_block);
680 const char *get_ras_block_str(struct ras_common_if *ras_block);
A Damdgpu_umc.h51 struct amdgpu_ras_block_object ras_block; member
90 int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
A Dgmc_v11_0.c586 amdgpu_ras_register_ras_block(adev, &adev->umc.ras->ras_block); in gmc_v11_0_set_umc_funcs()
588 strcpy(adev->umc.ras->ras_block.ras_comm.name, "umc"); in gmc_v11_0_set_umc_funcs()
589 adev->umc.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__UMC; in gmc_v11_0_set_umc_funcs()
590 adev->umc.ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in gmc_v11_0_set_umc_funcs()
591 adev->umc.ras_if = &adev->umc.ras->ras_block.ras_comm; in gmc_v11_0_set_umc_funcs()
594 if (!adev->umc.ras->ras_block.ras_late_init) in gmc_v11_0_set_umc_funcs()
595 adev->umc.ras->ras_block.ras_late_init = amdgpu_umc_ras_late_init; in gmc_v11_0_set_umc_funcs()
598 if (!adev->umc.ras->ras_block.ras_cb) in gmc_v11_0_set_umc_funcs()
599 adev->umc.ras->ras_block.ras_cb = amdgpu_umc_process_ras_data_cb; in gmc_v11_0_set_umc_funcs()
A Damdgpu_sdma.h55 struct amdgpu_ras_block_object ras_block; member
120 struct ras_common_if *ras_block);
A Damdgpu_nbio.h51 struct amdgpu_ras_block_object ras_block; member
109 int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
A Dgmc_v10_0.c703 amdgpu_ras_register_ras_block(adev, &adev->umc.ras->ras_block); in gmc_v10_0_set_umc_funcs()
705 strcpy(adev->umc.ras->ras_block.ras_comm.name, "umc"); in gmc_v10_0_set_umc_funcs()
706 adev->umc.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__UMC; in gmc_v10_0_set_umc_funcs()
707 adev->umc.ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in gmc_v10_0_set_umc_funcs()
708 adev->umc.ras_if = &adev->umc.ras->ras_block.ras_comm; in gmc_v10_0_set_umc_funcs()
711 if (!adev->umc.ras->ras_block.ras_late_init) in gmc_v10_0_set_umc_funcs()
712 adev->umc.ras->ras_block.ras_late_init = amdgpu_umc_ras_late_init; in gmc_v10_0_set_umc_funcs()
715 if (!adev->umc.ras->ras_block.ras_cb) in gmc_v10_0_set_umc_funcs()
716 adev->umc.ras->ras_block.ras_cb = amdgpu_umc_process_ras_data_cb; in gmc_v10_0_set_umc_funcs()
A Damdgpu_mca.h25 struct amdgpu_ras_block_object ras_block; member
A Damdgpu_mmhub.h25 struct amdgpu_ras_block_object ras_block; member
A Damdgpu_jpeg.h45 struct amdgpu_ras_block_object ras_block; member
A Damdgpu_vcn.c1170 amdgpu_ras_register_ras_block(adev, &adev->vcn.ras->ras_block); in amdgpu_vcn_set_ras_funcs()
1172 strcpy(adev->vcn.ras->ras_block.ras_comm.name, "vcn"); in amdgpu_vcn_set_ras_funcs()
1173 adev->vcn.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__VCN; in amdgpu_vcn_set_ras_funcs()
1174 adev->vcn.ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON; in amdgpu_vcn_set_ras_funcs()
1175 adev->vcn.ras_if = &adev->vcn.ras->ras_block.ras_comm; in amdgpu_vcn_set_ras_funcs()
1178 if (!adev->vcn.ras->ras_block.ras_late_init) in amdgpu_vcn_set_ras_funcs()
1179 adev->vcn.ras->ras_block.ras_late_init = amdgpu_ras_block_late_init; in amdgpu_vcn_set_ras_funcs()
A Damdgpu_xgmi.c838 static int amdgpu_xgmi_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in amdgpu_xgmi_ras_late_init() argument
844 adev->gmc.xgmi.ras->ras_block.hw_ops->reset_ras_error_count(adev); in amdgpu_xgmi_ras_late_init()
846 return amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_xgmi_ras_late_init()
1010 adev->gmc.xgmi.ras->ras_block.hw_ops->reset_ras_error_count(adev); in amdgpu_xgmi_query_ras_error_count()
1050 .ras_block = {
A Damdgpu_gfx.h212 struct amdgpu_ras_block_object ras_block; member
427 int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
A Dhdp_v4_0.c162 .ras_block = {
A Dsdma_v4_4.c267 .ras_block = {
A Damdgpu_gmc.c454 amdgpu_ras_register_ras_block(adev, &adev->gmc.xgmi.ras->ras_block); in amdgpu_gmc_ras_early_init()
455 adev->gmc.xgmi.ras_if = &adev->gmc.xgmi.ras->ras_block.ras_comm; in amdgpu_gmc_ras_early_init()
A Damdgpu_gmc.h142 struct amdgpu_ras_block_object ras_block; member

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