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Searched refs:reset_ctl (Results 1 – 6 of 6) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Dsmu_v13_0_10.c56 if (smu_v13_0_10_is_mode2_default(reset_ctl) && in smu_v13_0_10_get_reset_handler()
119 struct amdgpu_reset_control *reset_ctl = in smu_v13_0_10_async_reset() local
277 struct amdgpu_reset_control *reset_ctl; in smu_v13_0_10_reset_init() local
279 reset_ctl = kzalloc(sizeof(*reset_ctl), GFP_KERNEL); in smu_v13_0_10_reset_init()
280 if (!reset_ctl) in smu_v13_0_10_reset_init()
283 reset_ctl->handle = adev; in smu_v13_0_10_reset_init()
284 reset_ctl->async_reset = smu_v13_0_10_async_reset; in smu_v13_0_10_reset_init()
285 reset_ctl->active_reset = AMD_RESET_METHOD_NONE; in smu_v13_0_10_reset_init()
288 INIT_LIST_HEAD(&reset_ctl->reset_handlers); in smu_v13_0_10_reset_init()
289 INIT_WORK(&reset_ctl->reset_work, reset_ctl->async_reset); in smu_v13_0_10_reset_init()
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A Dsienna_cichlid.c60 if (sienna_cichlid_is_mode2_default(reset_ctl)) { in sienna_cichlid_get_reset_handler()
120 struct amdgpu_reset_control *reset_ctl = in sienna_cichlid_async_reset() local
286 struct amdgpu_reset_control *reset_ctl; in sienna_cichlid_reset_init() local
288 reset_ctl = kzalloc(sizeof(*reset_ctl), GFP_KERNEL); in sienna_cichlid_reset_init()
289 if (!reset_ctl) in sienna_cichlid_reset_init()
292 reset_ctl->handle = adev; in sienna_cichlid_reset_init()
293 reset_ctl->async_reset = sienna_cichlid_async_reset; in sienna_cichlid_reset_init()
294 reset_ctl->active_reset = AMD_RESET_METHOD_NONE; in sienna_cichlid_reset_init()
297 INIT_LIST_HEAD(&reset_ctl->reset_handlers); in sienna_cichlid_reset_init()
298 INIT_WORK(&reset_ctl->reset_work, reset_ctl->async_reset); in sienna_cichlid_reset_init()
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A Daldebaran.c62 if (aldebaran_is_mode2_default(reset_ctl)) { in aldebaran_get_reset_handler()
124 struct amdgpu_reset_control *reset_ctl = in aldebaran_async_reset() local
400 struct amdgpu_reset_control *reset_ctl; in aldebaran_reset_init() local
402 reset_ctl = kzalloc(sizeof(*reset_ctl), GFP_KERNEL); in aldebaran_reset_init()
403 if (!reset_ctl) in aldebaran_reset_init()
406 reset_ctl->handle = adev; in aldebaran_reset_init()
407 reset_ctl->async_reset = aldebaran_async_reset; in aldebaran_reset_init()
408 reset_ctl->active_reset = AMD_RESET_METHOD_NONE; in aldebaran_reset_init()
411 INIT_LIST_HEAD(&reset_ctl->reset_handlers); in aldebaran_reset_init()
412 INIT_WORK(&reset_ctl->reset_work, reset_ctl->async_reset); in aldebaran_reset_init()
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A Damdgpu_reset.h48 int (*prepare_env)(struct amdgpu_reset_control *reset_ctl,
50 int (*prepare_hwcontext)(struct amdgpu_reset_control *reset_ctl,
52 int (*perform_reset)(struct amdgpu_reset_control *reset_ctl,
54 int (*restore_hwcontext)(struct amdgpu_reset_control *reset_ctl,
56 int (*restore_env)(struct amdgpu_reset_control *reset_ctl,
70 struct amdgpu_reset_control *reset_ctl,
100 int amdgpu_reset_add_handler(struct amdgpu_reset_control *reset_ctl,
A Damdgpu_reset.c29 int amdgpu_reset_add_handler(struct amdgpu_reset_control *reset_ctl, in amdgpu_reset_add_handler() argument
33 list_add_tail(&handler->handler_list, &reset_ctl->reset_handlers); in amdgpu_reset_add_handler()
/linux-6.3-rc2/drivers/gpu/drm/mediatek/
A Dmtk_disp_merge.c71 struct reset_control *reset_ctl; member
108 reset_control_reset(priv->reset_ctl); in mtk_merge_stop_cmdq()
273 priv->reset_ctl = devm_reset_control_get_optional_exclusive(dev, NULL); in mtk_disp_merge_probe()
274 if (IS_ERR(priv->reset_ctl)) in mtk_disp_merge_probe()
275 return PTR_ERR(priv->reset_ctl); in mtk_disp_merge_probe()

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