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Searched refs:rtl8192_setBBreg (Results 1 – 5 of 5) sorted by relevance

/linux-6.3-rc2/drivers/staging/rtl8192u/
A Dr819xU_phy.c142 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, in rtl8192_phy_RFSerialRead()
151 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, in rtl8192_phy_RFSerialRead()
221 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, in rtl8192_phy_RFSerialWrite()
228 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, in rtl8192_phy_RFSerialWrite()
254 rtl8192_setBBreg(dev, pPhyReg->rf3wireOffset, in rtl8192_phy_RFSerialWrite()
1503 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, in rtl8192_SetBWModeWorkItem()
1536 rtl8192_setBBreg(dev, rOFDM1_LSTF, 0xC00, in rtl8192_SetBWModeWorkItem()
1659 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in InitialGainOperateWorkItemCallBack()
1698 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in InitialGainOperateWorkItemCallBack()
1709 rtl8192_setBBreg(dev, rCCK0_CCA, bitmask, in InitialGainOperateWorkItemCallBack()
[all …]
A Dr8190_rtl8256.c146 rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); in phy_rf8256_config_para_file()
149 rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); in phy_rf8256_config_para_file()
152 …rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 0 to 4 bits for Z-se… in phy_rf8256_config_para_file()
153 …rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for Z-seri… in phy_rf8256_config_para_file()
207 rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); in phy_rf8256_config_para_file()
211 rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue); in phy_rf8256_config_para_file()
244 rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC); in phy_set_rf8256_cck_tx_power()
292 rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal); in phy_set_rf8256_ofdm_tx_power()
A Dr8192U_dm.c1368 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal); in dm_CCKTxPowerAdjust_TSSI()
1374 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal); in dm_CCKTxPowerAdjust_TSSI()
1379 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal); in dm_CCKTxPowerAdjust_TSSI()
1384 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal); in dm_CCKTxPowerAdjust_TSSI()
1390 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal); in dm_CCKTxPowerAdjust_TSSI()
1395 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal); in dm_CCKTxPowerAdjust_TSSI()
1409 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal); in dm_CCKTxPowerAdjust_ThermalMeter()
1417 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal); in dm_CCKTxPowerAdjust_ThermalMeter()
1424 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal); in dm_CCKTxPowerAdjust_ThermalMeter()
1433 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal); in dm_CCKTxPowerAdjust_ThermalMeter()
[all …]
A Dr819xU_phy.h50 void rtl8192_setBBreg(struct net_device *dev, u32 reg_addr,
A Dr8192U_core.c2607 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1); in rtl8192_adapter_start()
2608 rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1); in rtl8192_adapter_start()

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