/linux-6.3-rc2/crypto/ |
A D | simd.c | 237 struct simd_skcipher_alg *simd; in simd_register_skciphers_compat() local 249 simd = simd_skcipher_create_compat(algname, drvname, basename); in simd_register_skciphers_compat() 250 err = PTR_ERR(simd); in simd_register_skciphers_compat() 251 if (IS_ERR(simd)) in simd_register_skciphers_compat() 253 simd_algs[i] = simd; in simd_register_skciphers_compat() 484 struct simd_aead_alg *simd; in simd_register_aeads_compat() local 496 simd = simd_aead_create_compat(algname, drvname, basename); in simd_register_aeads_compat() 497 err = PTR_ERR(simd); in simd_register_aeads_compat() 498 if (IS_ERR(simd)) in simd_register_aeads_compat() 500 simd_algs[i] = simd; in simd_register_aeads_compat()
|
A D | Makefile | 207 crypto_simd-y := simd.o
|
/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
A D | gfx_v9_4_2.c | 422 uint32_t se, cu, simd, wave; in gfx_v9_4_2_log_wave_assignment() local 437 for (simd = 0; simd < SIMD_ID_MAX; simd++) { in gfx_v9_4_2_log_wave_assignment() 456 uint32_t se, cu, simd, wave; in gfx_v9_4_2_wait_for_waves_assigned() local 467 for (simd = 0; simd < SIMD_ID_MAX; simd++) in gfx_v9_4_2_wait_for_waves_assigned() 1829 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind() 1839 uint32_t i, simd, wave; in gfx_v9_4_2_log_cu_timeout_status() local 1850 simd = i / cu_info->max_waves_per_simd; in gfx_v9_4_2_log_cu_timeout_status() 1857 wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v9_4_2_log_cu_timeout_status() 1859 wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v9_4_2_log_cu_timeout_status() 1861 wave_read_ind(adev, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v9_4_2_log_cu_timeout_status() [all …]
|
A D | gfx_v6_0.c | 2950 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind() 2956 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, in wave_read_regs() argument 2962 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs() 2975 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v6_0_read_wave_data() 2976 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v6_0_read_wave_data() 2977 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v6_0_read_wave_data() 2980 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v6_0_read_wave_data() 2986 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS); in gfx_v6_0_read_wave_data() 2992 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); in gfx_v6_0_read_wave_data() 2993 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE); in gfx_v6_0_read_wave_data() [all …]
|
A D | gfx_v7_0.c | 4093 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind() 4099 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, in wave_read_regs() argument 4105 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs() 4118 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v7_0_read_wave_data() 4119 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v7_0_read_wave_data() 4120 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v7_0_read_wave_data() 4123 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v7_0_read_wave_data() 4129 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS); in gfx_v7_0_read_wave_data() 4135 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); in gfx_v7_0_read_wave_data() 4136 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE); in gfx_v7_0_read_wave_data() [all …]
|
A D | amdgpu_gfx.h | 227 void (*read_wave_data)(struct amdgpu_device *adev, uint32_t simd, 229 void (*read_wave_vgprs)(struct amdgpu_device *adev, uint32_t simd, 232 void (*read_wave_sgprs)(struct amdgpu_device *adev, uint32_t simd,
|
A D | amdgpu_debugfs.c | 883 uint32_t offset, se, sh, cu, wave, simd, data[32]; in amdgpu_debugfs_wave_read() local 894 simd = (*pos & GENMASK_ULL(44, 37)) >> 37; in amdgpu_debugfs_wave_read() 914 adev->gfx.funcs->read_wave_data(adev, simd, wave, data, &x); in amdgpu_debugfs_wave_read() 975 uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data; in amdgpu_debugfs_gpr_read() local 986 simd = (*pos & GENMASK_ULL(51, 44)) >> 44; in amdgpu_debugfs_gpr_read() 1008 adev->gfx.funcs->read_wave_vgprs(adev, simd, wave, thread, offset, size>>2, data); in amdgpu_debugfs_gpr_read() 1011 adev->gfx.funcs->read_wave_sgprs(adev, simd, wave, offset, size>>2, data); in amdgpu_debugfs_gpr_read()
|
A D | gfx_v8_0.c | 5198 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind() 5204 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, in wave_read_regs() argument 5210 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs() 5223 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v8_0_read_wave_data() 5224 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v8_0_read_wave_data() 5225 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v8_0_read_wave_data() 5228 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v8_0_read_wave_data() 5234 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS); in gfx_v8_0_read_wave_data() 5240 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); in gfx_v8_0_read_wave_data() 5241 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE); in gfx_v8_0_read_wave_data() [all …]
|
A D | gfx_v9_0.c | 1760 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind() 1766 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, in wave_read_regs() argument 1772 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs() 1785 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v9_0_read_wave_data() 1786 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v9_0_read_wave_data() 1787 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_0_read_wave_data() 1790 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v9_0_read_wave_data() 1798 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); in gfx_v9_0_read_wave_data() 1799 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE); in gfx_v9_0_read_wave_data() 1807 adev, simd, wave, 0, in gfx_v9_0_read_wave_sgprs() [all …]
|
A D | gfx_v11_0.c | 750 static void gfx_v11_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint… in gfx_v11_0_read_wave_data() argument 755 WARN_ON(simd != 0); in gfx_v11_0_read_wave_data() 776 static void gfx_v11_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd, in gfx_v11_0_read_wave_sgprs() argument 780 WARN_ON(simd != 0); in gfx_v11_0_read_wave_sgprs() 787 static void gfx_v11_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t simd, in gfx_v11_0_read_wave_vgprs() argument
|
A D | gfx_v10_0.c | 4294 static void gfx_v10_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint… in gfx_v10_0_read_wave_data() argument 4299 WARN_ON(simd != 0); in gfx_v10_0_read_wave_data() 4321 static void gfx_v10_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd, in gfx_v10_0_read_wave_sgprs() argument 4325 WARN_ON(simd != 0); in gfx_v10_0_read_wave_sgprs() 4332 static void gfx_v10_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t simd, in gfx_v10_0_read_wave_vgprs() argument
|
/linux-6.3-rc2/arch/arm/crypto/ |
A D | aes-neonbs-glue.c | 521 struct simd_skcipher_alg *simd; in aes_init() local 542 simd = simd_skcipher_create_compat(algname, drvname, basename); in aes_init() 543 err = PTR_ERR(simd); in aes_init() 544 if (IS_ERR(simd)) in aes_init() 547 aes_simd_algs[i] = simd; in aes_init()
|
A D | aes-ce-glue.c | 696 struct simd_skcipher_alg *simd; in aes_init() local 714 simd = simd_skcipher_create_compat(algname, drvname, basename); in aes_init() 715 err = PTR_ERR(simd); in aes_init() 716 if (IS_ERR(simd)) in aes_init() 719 aes_simd_algs[i] = simd; in aes_init()
|
/linux-6.3-rc2/include/asm-generic/ |
A D | Kbuild | 53 mandatory-y += simd.h
|