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Searched refs:AON_RTC_O_SYNC (Results 1 – 6 of 6) sorted by relevance

/lk-master/external/platform/cc13xx/cc13xxware/driverlib/
A Dpwr_ctrl.c118 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in PowerCtrlStateSet()
186 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in PowerCtrlStateSet()
245 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in PowerCtrlStateSet()
A Dsys_ctrl.h249 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in SysCtrlAonSync()
277 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC) = 1; in SysCtrlAonUpdate()
278 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in SysCtrlAonUpdate()
A Dpwr_ctrl.h289 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in PowerCtrlIOFreezeEnable()
314 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in PowerCtrlIOFreezeDisable()
A Daon_wuc.c70 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in AONWUCAuxReset()
77 HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); in AONWUCAuxReset()
A Dsetup.c1276 HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ); // Wait one SCLK_LF period in SetVddrLevel()
1283 HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ) = 1; // Force SCLK_LF period wait on next read in SetVddrLevel()
1286 HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ); // Wait one SCLK_LF period in SetVddrLevel()
1287 HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ) = 1; // Force SCLK_LF period wait on next read in SetVddrLevel()
1288 …HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ); // Wait one more SCLK_LF period before re-enabling VDD… in SetVddrLevel()
1290 …HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ); // And finally wait for VDDR_LOSS_EN setting to propag… in SetVddrLevel()
/lk-master/external/platform/cc13xx/cc13xxware/inc/
A Dhw_aon_rtc.h80 #define AON_RTC_O_SYNC 0x0000002C macro

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