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Searched refs:ASSERT (Results 1 – 25 of 102) sorted by relevance

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/lk-master/external/platform/stellaris/ti-driverlib/driverlib/
A Dlpc.c110 ASSERT(ulBase == LPC0_BASE); in LPCConfigSet()
143 ASSERT(ulBase == LPC0_BASE); in LPCConfigGet()
173 ASSERT(ulBase == LPC0_BASE); in LPCStatusBlockAddressSet()
200 ASSERT(ulBase == LPC0_BASE); in LPCStatusBlockAddressGet()
232 ASSERT(ulBase == LPC0_BASE); in LPCStatusGet()
282 ASSERT(ulBase == LPC0_BASE); in LPCSCIAssert()
283 ASSERT(ulCount <= 3); in LPCSCIAssert()
329 ASSERT(ulBase == LPC0_BASE); in LPCIRQConfig()
382 ASSERT(ulBase == LPC0_BASE); in LPCIRQSet()
420 ASSERT(ulBase == LPC0_BASE); in LPCIRQClear()
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A Depi.c260 ASSERT(ulMaxWait < 256); in EPIConfigHB8Set()
500 ASSERT(ulMap < 0x100); in EPIAddressMapSet()
548 ASSERT(ulChannel < 2); in EPINonBlockingReadConfigure()
549 ASSERT(ulDataSize < 4); in EPINonBlockingReadConfigure()
600 ASSERT(ulChannel < 2); in EPINonBlockingReadStart()
636 ASSERT(ulChannel < 2); in EPINonBlockingReadStop()
671 ASSERT(ulChannel < 2); in EPINonBlockingReadCount()
741 ASSERT(pulBuf); in EPINonBlockingReadGet32()
796 ASSERT(pusBuf); in EPINonBlockingReadGet16()
851 ASSERT(pucBuf); in EPINonBlockingReadGet8()
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A Dfan.c74 ASSERT(ulChannel < 6); in FanChannelEnable()
101 ASSERT(ulChannel < 6); in FanChannelDisable()
134 ASSERT(ulChannel < 6); in FanChannelStatus()
180 ASSERT(ulChannel < 6); in FanChannelConfigManual()
257 ASSERT(ulChannel < 6); in FanChannelConfigAuto()
288 ASSERT(ulChannel < 6); in FanChannelDutySet()
289 ASSERT(ulDuty < 512); in FanChannelDutySet()
323 ASSERT(ulChannel < 6); in FanChannelDutyGet()
361 ASSERT(ulChannel < 6); in FanChannelRPMSet()
362 ASSERT(ulRPM < 8192); in FanChannelRPMSet()
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A Dudma.c870 ASSERT(pvTaskList != 0); in uDMAChannelScatterGatherSet()
871 ASSERT(ulTaskCount <= 1024); in uDMAChannelScatterGatherSet()
872 ASSERT(ulTaskCount != 0); in uDMAChannelScatterGatherSet()
1201 ASSERT(pfnHandler); in uDMAIntRegister()
1271 ASSERT(!CLASS_IS_SANDSTORM); in uDMAIntStatus()
1272 ASSERT(!CLASS_IS_FURY); in uDMAIntStatus()
1274 ASSERT(!CLASS_IS_TEMPEST); in uDMAIntStatus()
1307 ASSERT(!CLASS_IS_FURY); in uDMAIntClear()
1309 ASSERT(!CLASS_IS_TEMPEST); in uDMAIntClear()
1353 ASSERT(!CLASS_IS_FURY); in uDMAChannelAssign()
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A Dadc.c111 ASSERT(ulSequenceNum < 4); in ADCIntRegister()
156 ASSERT(ulSequenceNum < 4); in ADCIntUnregister()
194 ASSERT(ulSequenceNum < 4); in ADCIntDisable()
223 ASSERT(ulSequenceNum < 4); in ADCIntEnable()
262 ASSERT(ulSequenceNum < 4); in ADCIntStatus()
323 ASSERT(ulSequenceNum < 4); in ADCIntClear()
351 ASSERT(ulSequenceNum < 4); in ADCSequenceEnable()
464 ASSERT(ulPriority < 4); in ADCSequenceConfigure()
1153 ASSERT(ulComp < 8); in ADCComparatorConfigure()
1189 ASSERT(ulComp < 8); in ADCComparatorRegionSet()
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A Dpeci.c156 ASSERT(ulPECIClk != 0); in PECIConfigSet()
160 ASSERT((ulPoll == 0) || in PECIConfigSet()
235 ASSERT(ulPECIClk != 0); in PECIConfigGet()
236 ASSERT(pulBaud != 0); in PECIConfigGet()
237 ASSERT(pulPoll != 0); in PECIConfigGet()
238 ASSERT(pulOffset != 0); in PECIConfigGet()
239 ASSERT(pulRetry != 0); in PECIConfigGet()
348 ASSERT(ulLow <= 0xFFFF); in PECIDomainConfigSet()
349 ASSERT(ulHigh > ulLow); in PECIDomainConfigSet()
393 ASSERT(pulHigh != 0); in PECIDomainConfigGet()
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A Dpwm.c205 ASSERT(PWMGenValid(ulGen)); in PWMGenConfigure()
282 ASSERT(PWMGenValid(ulGen)); in PWMGenPeriodSet()
339 ASSERT(PWMGenValid(ulGen)); in PWMGenPeriodGet()
386 ASSERT(PWMGenValid(ulGen)); in PWMGenEnable()
415 ASSERT(PWMGenValid(ulGen)); in PWMGenDisable()
475 ASSERT(ulWidth < ulReg); in PWMPulseWidthSet()
584 ASSERT(PWMGenValid(ulGen)); in PWMDeadBandEnable()
585 ASSERT(usRise < 4096); in PWMDeadBandEnable()
586 ASSERT(usFall < 4096); in PWMDeadBandEnable()
626 ASSERT(PWMGenValid(ulGen)); in PWMDeadBandDisable()
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A Di2s.c74 ASSERT(ulBase == I2S0_BASE); in I2STxEnable()
106 ASSERT(ulBase == I2S0_BASE); in I2STxDisable()
152 ASSERT(ulBase == I2S0_BASE); in I2STxDataPut()
205 ASSERT(ulBase == I2S0_BASE); in I2STxDataPutNonBlocking()
260 ASSERT(ulBase == I2S0_BASE); in I2STxConfigSet()
329 ASSERT(ulBase == I2S0_BASE); in I2STxFIFOLimitSet()
330 ASSERT(ulLevel <= 16); in I2STxFIFOLimitSet()
357 ASSERT(ulBase == I2S0_BASE); in I2STxFIFOLimitGet()
391 ASSERT(ulBase == I2S0_BASE); in I2STxFIFOLevelGet()
674 ASSERT(ulLevel <= 16); in I2SRxFIFOLimitSet()
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A Duart.c174 ASSERT(UARTBaseValid(ulBase)); in UARTParityModeSet()
209 ASSERT(UARTBaseValid(ulBase)); in UARTParityModeGet()
243 ASSERT(UARTBaseValid(ulBase)); in UARTFIFOLevelSet()
288 ASSERT(UARTBaseValid(ulBase)); in UARTFIFOLevelGet()
352 ASSERT(UARTBaseValid(ulBase)); in UARTConfigSetExpClk()
353 ASSERT(ulBaud != 0); in UARTConfigSetExpClk()
455 ASSERT(UARTBaseValid(ulBase)); in UARTConfigGetExpClk()
792 ASSERT(ulBase == UART1_BASE); in UARTModemControlSet()
835 ASSERT(ulBase == UART1_BASE); in UARTModemControlClear()
872 ASSERT(ulBase == UART1_BASE); in UARTModemControlGet()
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A Di2c.c201 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterInitExpClk()
263 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveInit()
264 ASSERT(!(ucSlaveAddr & 0x80)); in I2CSlaveInit()
302 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveAddressSet()
303 ASSERT(!(ucAddrNum > 1)); in I2CSlaveAddressSet()
304 ASSERT(!(ucSlaveAddr & 0x80)); in I2CSlaveAddressSet()
373 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveEnable()
429 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveDisable()
611 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntEnable()
649 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntEnableEx()
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A Dcomp.c119 ASSERT(ulBase == COMP_BASE); in ComparatorConfigure()
120 ASSERT(ulComp < 3); in ComparatorConfigure()
177 ASSERT(ulBase == COMP_BASE); in ComparatorRefSet()
204 ASSERT(ulBase == COMP_BASE); in ComparatorValueGet()
205 ASSERT(ulComp < 3); in ComparatorValueGet()
249 ASSERT(ulComp < 3); in ComparatorIntRegister()
291 ASSERT(ulComp < 3); in ComparatorIntUnregister()
330 ASSERT(ulComp < 3); in ComparatorIntEnable()
359 ASSERT(ulComp < 3); in ComparatorIntDisable()
391 ASSERT(ulComp < 3); in ComparatorIntStatus()
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A Dtimer.c165 ASSERT(TimerBaseValid(ulBase)); in TimerEnable()
194 ASSERT(TimerBaseValid(ulBase)); in TimerDisable()
263 ASSERT(TimerBaseValid(ulBase)); in TimerConfigure()
330 ASSERT(TimerBaseValid(ulBase)); in TimerControlLevel()
366 ASSERT(TimerBaseValid(ulBase)); in TimerControlTrigger()
404 ASSERT(TimerBaseValid(ulBase)); in TimerControlEvent()
440 ASSERT(TimerBaseValid(ulBase)); in TimerControlStall()
480 ASSERT(TimerBaseValid(ulBase)); in TimerControlWaitOnTrigger()
533 ASSERT(TimerBaseValid(ulBase)); in TimerRTCEnable()
600 ASSERT(ulValue < 256); in TimerPrescaleSet()
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A Dssi.c204 ASSERT(SSIBaseValid(ulBase)); in SSIConfigSetExpClk()
266 ASSERT(SSIBaseValid(ulBase)); in SSIEnable()
291 ASSERT(SSIBaseValid(ulBase)); in SSIDisable()
327 ASSERT(SSIBaseValid(ulBase)); in SSIIntRegister()
369 ASSERT(SSIBaseValid(ulBase)); in SSIIntUnregister()
409 ASSERT(SSIBaseValid(ulBase)); in SSIIntEnable()
437 ASSERT(SSIBaseValid(ulBase)); in SSIIntDisable()
467 ASSERT(SSIBaseValid(ulBase)); in SSIIntStatus()
514 ASSERT(SSIBaseValid(ulBase)); in SSIIntClear()
547 ASSERT(SSIBaseValid(ulBase)); in SSIDataPut()
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A Dwatchdog.c73 ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE)); in WatchdogRunning()
102 ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE)); in WatchdogEnable()
132 ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE)); in WatchdogResetEnable()
162 ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE)); in WatchdogResetDisable()
188 ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE)); in WatchdogLock()
215 ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE)); in WatchdogUnlock()
241 ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE)); in WatchdogLockState()
275 ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE)); in WatchdogReloadSet()
303 ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE)); in WatchdogReloadGet()
328 ASSERT((ulBase == WATCHDOG0_BASE) || (ulBase == WATCHDOG1_BASE)); in WatchdogValueGet()
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A Dqei.c75 ASSERT((ulBase == QEI0_BASE) || (ulBase == QEI1_BASE)); in QEIEnable()
100 ASSERT((ulBase == QEI0_BASE) || (ulBase == QEI1_BASE)); in QEIDisable()
146 ASSERT((ulBase == QEI0_BASE) || (ulBase == QEI1_BASE)); in QEIConfigure()
183 ASSERT((ulBase == QEI0_BASE) || (ulBase == QEI1_BASE)); in QEIPositionGet()
210 ASSERT((ulBase == QEI0_BASE) || (ulBase == QEI1_BASE)); in QEIPositionSet()
239 ASSERT((ulBase == QEI0_BASE) || (ulBase == QEI1_BASE)); in QEIDirectionGet()
266 ASSERT((ulBase == QEI0_BASE) || (ulBase == QEI1_BASE)); in QEIErrorGet()
295 ASSERT((ulBase == QEI0_BASE) || (ulBase == QEI1_BASE)); in QEIVelocityEnable()
321 ASSERT((ulBase == QEI0_BASE) || (ulBase == QEI1_BASE)); in QEIVelocityDisable()
358 ASSERT(!(ulPreDiv & ~(QEI_CTL_VELDIV_M))); in QEIVelocityConfigure()
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A Dethernet.c93 ASSERT(ulBase == ETH_BASE); in EthernetInitExpClk()
276 ASSERT(pucMACAddr != 0); in EthernetMACAddrSet()
321 ASSERT(pucMACAddr != 0); in EthernetMACAddrGet()
656 ASSERT(pucBuf != 0); in EthernetPacketGetNonBlocking()
657 ASSERT(lBufLen > 0); in EthernetPacketGetNonBlocking()
705 ASSERT(pucBuf != 0); in EthernetPacketGet()
706 ASSERT(lBufLen > 0); in EthernetPacketGet()
878 ASSERT(pucBuf != 0); in EthernetPacketPutNonBlocking()
879 ASSERT(lBufLen > 0); in EthernetPacketPutNonBlocking()
927 ASSERT(pucBuf != 0); in EthernetPacketPut()
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A Deeprom.c306 ASSERT(pulData); in EEPROMRead()
309 ASSERT((ulAddress & 3) == 0); in EEPROMRead()
310 ASSERT((ulCount & 3) == 0); in EEPROMRead()
379 ASSERT(pulData); in EEPROMProgram()
382 ASSERT((ulAddress & 3) == 0); in EEPROMProgram()
383 ASSERT((ulCount & 3) == 0); in EEPROMProgram()
763 ASSERT(pulPassword); in EEPROMBlockPasswordSet()
765 ASSERT(ulCount <= 3); in EEPROMBlockPasswordSet()
890 ASSERT(pulPassword); in EEPROMBlockUnlock()
892 ASSERT(ulCount <= 3); in EEPROMBlockUnlock()
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A Dgpio.c288 ASSERT(GPIOBaseValid(ulPort)); in GPIODirModeSet()
328 ASSERT(GPIOBaseValid(ulPort)); in GPIODirModeGet()
329 ASSERT(ucPin < 8); in GPIODirModeGet()
394 ASSERT(GPIOBaseValid(ulPort)); in GPIOIntTypeSet()
438 ASSERT(GPIOBaseValid(ulPort)); in GPIOIntTypeGet()
439 ASSERT(ucPin < 8); in GPIOIntTypeGet()
513 ASSERT(GPIOBaseValid(ulPort)); in GPIOPadConfigSet()
597 ASSERT(GPIOBaseValid(ulPort)); in GPIOPadConfigGet()
598 ASSERT(ucPin < 8); in GPIOPadConfigGet()
646 ASSERT(GPIOBaseValid(ulPort)); in GPIOPinIntEnable()
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/lk-master/external/platform/cc13xx/cc13xxware/driverlib/
A Dadi.h166 ASSERT(ADIBaseValid(ui32Base)); in ADI8RegWrite()
216 ASSERT(ADIBaseValid(ui32Base)); in ADI16RegWrite()
265 ASSERT(ADIBaseValid(ui32Base)); in ADI32RegWrite()
305 ASSERT(ADIBaseValid(ui32Base)); in ADI8RegRead()
348 ASSERT(ADIBaseValid(ui32Base)); in ADI16RegRead()
389 ASSERT(ADIBaseValid(ui32Base)); in ADI32RegRead()
440 ASSERT(ADIBaseValid(ui32Base)); in ADI8BitsSet()
788 ASSERT(!(ui8Val & 0xF0)); in ADI4SetValBit()
789 ASSERT(!(ui8Mask & 0xF0)); in ADI4SetValBit()
846 ASSERT(!(ui16Val & 0xFF00)); in ADI8SetValBit()
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A Di2c.h229 ASSERT(I2CBaseValid(ui32Base)); in I2CMasterControl()
279 ASSERT(I2CBaseValid(ui32Base)); in I2CMasterSlaveAddrSet()
280 ASSERT(!(ui8SlaveAddr & 0x80)); in I2CMasterSlaveAddrSet()
303 ASSERT(I2CBaseValid(ui32Base)); in I2CMasterEnable()
327 ASSERT(I2CBaseValid(ui32Base)); in I2CMasterDisable()
356 ASSERT(I2CBaseValid(ui32Base)); in I2CMasterBusy()
392 ASSERT(I2CBaseValid(ui32Base)); in I2CMasterBusBusy()
425 ASSERT(I2CBaseValid(ui32Base)); in I2CMasterDataGet()
451 ASSERT(I2CBaseValid(ui32Base)); in I2CMasterDataPut()
494 ASSERT(I2CBaseValid(ui32Base)); in I2CMasterIntEnable()
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A Dioc.c104 ASSERT(ui32IOId <= IOID_31); in IOCPortConfigureSet()
131 ASSERT(ui32IOId <= IOID_31); in IOCPortConfigureGet()
158 ASSERT(ui32IOId <= IOID_31); in IOCIOShutdownSet()
191 ASSERT(ui32IOId <= IOID_31); in IOCIOModeSet()
226 ASSERT(ui32IOId <= IOID_31); in IOCIOIntSet()
261 ASSERT(ui32IOId <= IOID_31); in IOCIOPortPullSet()
293 ASSERT(ui32IOId <= IOID_31); in IOCIOHystSet()
324 ASSERT(ui32IOId <= IOID_31); in IOCIOInputSet()
355 ASSERT(ui32IOId <= IOID_31); in IOCIOSlewCtrlSet()
387 ASSERT(ui32IOId <= IOID_31); in IOCIODrvStrengthSet()
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A Dudma.h367 ASSERT(uDMABaseValid(ui32Base)); in uDMAEnable()
393 ASSERT(uDMABaseValid(ui32Base)); in uDMADisable()
420 ASSERT(uDMABaseValid(ui32Base)); in uDMAErrorStatusGet()
446 ASSERT(uDMABaseValid(ui32Base)); in uDMAErrorStatusClear()
478 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelEnable()
507 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelDisable()
538 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelIsEnabled()
583 ASSERT(uDMABaseValid(ui32Base)); in uDMAControlBaseSet()
614 ASSERT(uDMABaseValid(ui32Base)); in uDMAControlBaseGet()
641 ASSERT(uDMABaseValid(ui32Base)); in uDMAControlAlternateBaseGet()
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A Dudma.c78 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelAttributeEnable()
129 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelAttributeDisable()
181 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelAttributeGet()
236 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelControlSet()
277 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelTransferSet()
281 ASSERT((uint32_t)pvSrcAddr >= SRAM_BASE); in uDMAChannelTransferSet()
401 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelScatterGatherSet()
404 ASSERT(pvTaskList != 0); in uDMAChannelScatterGatherSet()
406 ASSERT(ui32TaskCount != 0); in uDMAChannelScatterGatherSet()
470 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelSizeGet()
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A Dtimer.h240 ASSERT(TimerBaseValid(ui32Base)); in TimerEnable()
271 ASSERT(TimerBaseValid(ui32Base)); in TimerDisable()
383 ASSERT(TimerBaseValid(ui32Base)); in TimerEventControl()
485 ASSERT(TimerBaseValid(ui32Base)); in TimerPrescaleSet()
488 ASSERT(ui32Value < 256); in TimerPrescaleSet()
540 ASSERT(TimerBaseValid(ui32Base)); in TimerPrescaleGet()
579 ASSERT(TimerBaseValid(ui32Base)); in TimerPrescaleMatchSet()
582 ASSERT(ui32Value < 256); in TimerPrescaleMatchSet()
626 ASSERT(TimerBaseValid(ui32Base)); in TimerPrescaleMatchGet()
665 ASSERT(TimerBaseValid(ui32Base)); in TimerLoadSet()
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A Dgpio.h155 ASSERT( dioNumberLegal( dioNumber )); in GPIO_readDio()
189 ASSERT( dioMask & GPIO_DIO_ALL_MASK ); in GPIO_readMultiDio()
217 ASSERT( dioNumberLegal( dioNumber )); in GPIO_writeDio()
253 ASSERT( dioMask & GPIO_DIO_ALL_MASK ); in GPIO_writeMultiDio()
277 ASSERT( dioNumberLegal( dioNumber )); in GPIO_setDio()
306 ASSERT( dioMask & GPIO_DIO_ALL_MASK ); in GPIO_setMultiDio()
331 ASSERT( dioNumberLegal( dioNumber )); in GPIO_clearDio()
385 ASSERT( dioNumberLegal( dioNumber )); in GPIO_toggleDio()
444 ASSERT( dioNumberLegal( dioNumber )); in GPIO_getOutputEnableDio()
509 ASSERT( dioNumberLegal( dioNumber )); in GPIO_setOutputEnableDio()
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