Searched refs:AUX_WUC_BASE (Results 1 – 5 of 5) sorted by relevance
84 HWREG(AUX_WUC_BASE + AUX_WUC_O_MODCLKEN0) |= (ui32Clocks & in AUXWUCClockEnable()92 HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL) = in AUXWUCClockEnable()97 HWREG(AUX_WUC_BASE + AUX_WUC_O_TDCCLKCTL) = in AUXWUCClockEnable()102 HWREG(AUX_WUC_BASE + AUX_WUC_O_REFCLKCTL) = in AUXWUCClockEnable()133 HWREG(AUX_WUC_BASE + AUX_WUC_O_MODCLKEN0) &= ~(ui32Clocks & in AUXWUCClockDisable()141 HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL) &= in AUXWUCClockDisable()146 HWREG(AUX_WUC_BASE + AUX_WUC_O_TDCCLKCTL) &= in AUXWUCClockDisable()151 HWREG(AUX_WUC_BASE + AUX_WUC_O_REFCLKCTL) &= in AUXWUCClockDisable()294 HWREG(AUX_WUC_BASE + AUX_WUC_O_PWROFFREQ) = 0x0; in AUXWUCPowerCtrl()302 HWREG(AUX_WUC_BASE + AUX_WUC_O_PWRDWNREQ) = in AUXWUCPowerCtrl()[all …]
243 HWREG(AUX_WUC_BASE + AUX_WUC_O_CLKLFREQ) = ui32ClockFreq; in AUXWUCClockFreqReq()284 HWREG(AUX_WUC_BASE + AUX_WUC_O_AUXIOLATCH) = 0x0; in AUXWUCFreezeEnable()309 HWREG(AUX_WUC_BASE + AUX_WUC_O_AUXIOLATCH) = AUX_WUC_AUXIOLATCH_EN; in AUXWUCFreezeDisable()
99 HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL) = 0; in AUXADCDisable()119 HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL) = AUX_WUC_ADCCLKCTL_REQ_M; in AUXADCEnableAsync()120 while (!(HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL) & AUX_WUC_ADCCLKCTL_ACK_M)); in AUXADCEnableAsync()157 HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL) = AUX_WUC_ADCCLKCTL_REQ_M; in AUXADCEnableSync()158 while (!(HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL) & AUX_WUC_ADCCLKCTL_ACK_M)); in AUXADCEnableSync()
228 HWREG( AUX_WUC_BASE + AUX_WUC_O_MODCLKEN1 ) = AUX_WUC_MODCLKEN1_SMPH; in trimDevice()366 …HWREG( AUX_WUC_BASE + AUX_WUC_O_RTCSUBSECINC0 ) = (( subSecInc ) & AUX_WUC_RTCSUBSECINC0_INC… in SetAonRtcSubSecInc()367 …HWREG( AUX_WUC_BASE + AUX_WUC_O_RTCSUBSECINC1 ) = (( subSecInc >> 16 ) & AUX_WUC_RTCSUBSECINC1_INC… in SetAonRtcSubSecInc()369 HWREG( AUX_WUC_BASE + AUX_WUC_O_RTCSUBSECINCCTL ) = AUX_WUC_RTCSUBSECINCCTL_UPD_REQ; in SetAonRtcSubSecInc()370 …while( ! ( HWREGBITW( AUX_WUC_BASE + AUX_WUC_O_RTCSUBSECINCCTL, AUX_WUC_RTCSUBSECINCCTL_UPD_ACK_BI… in SetAonRtcSubSecInc()371 HWREG( AUX_WUC_BASE + AUX_WUC_O_RTCSUBSECINCCTL ) = 0; in SetAonRtcSubSecInc()409 HWREG(AUX_WUC_BASE + AUX_WUC_O_MODCLKEN0) = AUX_WUC_MODCLKEN0_AUX_DDI0_OSC | in HapiTrimDeviceShutDown()741 HWREG( AUX_WUC_BASE + AUX_WUC_O_MODCLKEN0 ) = AUX_WUC_MODCLKEN0_AUX_DDI0_OSC; in HapiTrimDeviceShutDown()
87 #define AUX_WUC_BASE 0x400C6000 // AUX_WUC macro
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