Searched refs:CLK_CTRL_DIVISOR0 (Results 1 – 3 of 3) sorted by relevance
/lk-master/target/uzed/ |
A D | target.c | 147 .dci_clk = CLK_CTRL_CLKACT | CLK_CTRL_DIVISOR0(35) | CLK_CTRL_DIVISOR1(3), 148 .gem0_clk = CLK_CTRL_CLKACT | CLK_CTRL_DIVISOR0(8) | CLK_CTRL_DIVISOR1(1), 150 .lqspi_clk = CLK_CTRL_CLKACT | CLK_CTRL_DIVISOR0(5), 151 .sdio_clk = CLK_CTRL_CLKACT | CLK_CTRL_DIVISOR0(20), 152 .uart_clk = CLK_CTRL_CLKACT1 | CLK_CTRL_DIVISOR0(20), 153 .pcap_clk = CLK_CTRL_CLKACT | CLK_CTRL_DIVISOR0(5), 154 .fpga0_clk = CLK_CTRL_DIVISOR0(10) | CLK_CTRL_DIVISOR1(1), 155 .fpga1_clk = CLK_CTRL_DIVISOR0(10) | CLK_CTRL_DIVISOR1(1), 156 .fpga2_clk = CLK_CTRL_DIVISOR0(30) | CLK_CTRL_DIVISOR1(1), 157 .fpga3_clk = CLK_CTRL_DIVISOR0(20) | CLK_CTRL_DIVISOR1(1),
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/lk-master/target/zybo/ |
A D | target.c | 151 .dci_clk = CLK_CTRL_CLKACT | CLK_CTRL_DIVISOR0(52) | CLK_CTRL_DIVISOR1(2), 152 .gem0_clk = CLK_CTRL_CLKACT | CLK_CTRL_DIVISOR0(8) | CLK_CTRL_DIVISOR1(1), 154 .lqspi_clk = CLK_CTRL_CLKACT | CLK_CTRL_DIVISOR0(5), 155 .sdio_clk = CLK_CTRL_CLKACT | CLK_CTRL_DIVISOR0(20), 156 .uart_clk = CLK_CTRL_CLKACT1 | CLK_CTRL_DIVISOR0(20), 157 .pcap_clk = CLK_CTRL_CLKACT | CLK_CTRL_DIVISOR0(5), 158 .fpga0_clk = CLK_CTRL_DIVISOR0(10) | CLK_CTRL_DIVISOR1(1), 159 .fpga1_clk = CLK_CTRL_SRCSEL(3) | CLK_CTRL_DIVISOR0(6) | CLK_CTRL_DIVISOR1(1), 160 .fpga2_clk = CLK_CTRL_SRCSEL(2) | CLK_CTRL_DIVISOR0(53) | CLK_CTRL_DIVISOR1(2),
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/lk-master/platform/zynq/include/platform/ |
A D | zynq.h | 405 #define CLK_CTRL_DIVISOR0(x) ((x & BIT_MASK(6)) << 8) macro
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