Searched refs:GEM0_RCLK_CTRL (Results 1 – 2 of 2) sorted by relevance

/lk-master/platform/zynq/
A D	platform.c	131 SLCR_REG(GEM0_RCLK_CTRL) = zynq_clk_cfg.gem0_rclk; in zynq_clk_init()
/lk-master/platform/zynq/include/platform/
A D	zynq.h	179 uint32_t GEM0_RCLK_CTRL; // GigE 0 Rx Clock and Rx Signals Select member

Completed in 6 milliseconds

Last Index update Sun Aug 20 00:18:20 CST 2023