Searched refs:I2C0_BASE (Results 1 – 9 of 9) sorted by relevance
172 return(ui32Base == I2C0_BASE); in I2CBaseValid()244 HWREG(I2C0_BASE + I2C_O_MCTRL) = ui32Cmd; in I2CMasterControl()330 HWREG(I2C0_BASE + I2C_O_MCTRL) = 0; in I2CMasterDisable()430 return(HWREG(I2C0_BASE + I2C_O_MDR)); in I2CMasterDataGet()456 HWREG(I2C0_BASE + I2C_O_MDR) = ui8Data; in I2CMasterDataPut()524 HWREG(I2C0_BASE + I2C_O_MIMR) = 0; in I2CMasterIntDisable()662 I2CSlaveEnable(I2C0_BASE); in I2CSlaveInit()715 HWREG(I2C0_BASE + I2C_O_SCTL) = 0x0; in I2CSlaveDisable()748 return(HWREG(I2C0_BASE + I2C_O_SSTAT)); in I2CSlaveStatus()774 return(HWREG(I2C0_BASE + I2C_O_SDR)); in I2CSlaveDataGet()[all …]
78 I2CMasterEnable(I2C0_BASE); in I2CMasterInitExpClk()99 HWREG(I2C0_BASE + I2C_O_MTPR) = ui32TPR; in I2CMasterInitExpClk()120 ui32Err = HWREG(I2C0_BASE + I2C_O_MSTAT); in I2CMasterErr()
52 #define I2C0_BASE 0x40044000 macro
58 #define i2c0_hw ((i2c_hw_t *const)I2C0_BASE)
40 #define I2C0_BASE (0xffc04000) macro
53 #define I2C0_BASE 0x40002000 // I2C macro
202 #define I2C0_BASE (0x11007000) macro
196 #define I2C0_BASE (0x11007000) macro
26 #define I2C0_BASE (0xe0004000) macro
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