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Searched refs:MIO_SPEED_FAST (Results 1 – 4 of 4) sorted by relevance

/lk-master/target/zybo/
A Dtarget.c86 [1] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_LVCMOS33,
87 [2] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_LVCMOS33,
88 [3] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_LVCMOS33,
89 [4] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_LVCMOS33,
90 [5] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_LVCMOS33,
91 [6] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_LVCMOS33,
94 [8] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_LVCMOS33,
116 [28] = MIO_L1_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_LVCMOS18,
118 [30] = MIO_L1_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_LVCMOS18,
120 [32] = MIO_L1_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_LVCMOS18,
[all …]
/lk-master/target/uzed/
A Dtarget.c99 [16] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_HSTL | MIO_PULLUP | MIO_DISABLE_RCVR,
100 [17] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_HSTL | MIO_PULLUP | MIO_DISABLE_RCVR,
101 [18] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_HSTL | MIO_PULLUP | MIO_DISABLE_RCVR,
102 [19] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_HSTL | MIO_PULLUP | MIO_DISABLE_RCVR,
103 [20] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_HSTL | MIO_PULLUP | MIO_DISABLE_RCVR,
106 [22] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_HSTL | MIO_PULLUP,
107 [23] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_HSTL | MIO_PULLUP,
108 [24] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_HSTL | MIO_PULLUP,
109 [25] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_HSTL | MIO_PULLUP,
110 [26] = MIO_L0_SEL | MIO_SPEED_FAST | MIO_IO_TYPE_HSTL | MIO_PULLUP,
[all …]
/lk-master/platform/zynq/
A Dgpio.c158 MIO_SPEED_FAST | in gpio_config()
/lk-master/platform/zynq/include/platform/
A Dzynq.h460 #define MIO_SPEED_FAST (1 << 8) macro

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