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Searched refs:writel (Results 1 – 16 of 16) sorted by relevance

/lk-master/app/mdebug/
A Dswd-sgpio.c93 writel(0, SLICE_CTRL_ENABLE); in sgpio_txn()
94 writel(0, SLICE_CTRL_DISABLE); in sgpio_txn()
113 writel(0, SLICE_CTRL_ENABLE); in sgpio_init()
114 writel(0, SLICE_CTRL_DISABLE); in sgpio_init()
146 writel(1, SLICE_REG(SLC_F)); in sgpio_init()
147 writel(1, SLICE_REG(SLC_O)); in sgpio_init()
270 writel(0, SLICE_REG(SLC_H)); in sgpio_swd_read()
273 writel(0, SLICE_REG(SLC_P)); in sgpio_swd_read()
280 writel(1, SLICE_REG(SLC_O)); in sgpio_swd_read()
282 writel(1, SLICE_REG(SLC_F)); in sgpio_swd_read()
[all …]
A Dswd-m0sub.c112 writel(0, M4_TXEV); in swd_init()
121 writel(0, RESET_CTRL0); in swd_init()
134 writel(data, COMM_ARG2); in swd_write()
135 writel(RSP_BUSY, COMM_RESP); in swd_write()
145 writel(M0_CMD_READ, COMM_CMD); in swd_read()
146 writel(hdr << 8, COMM_ARG1); in swd_read()
147 writel(RSP_BUSY, COMM_RESP); in swd_read()
175 writel(kind, COMM_CMD); in swd_reset()
176 writel(RSP_BUSY, COMM_RESP); in swd_reset()
193 writel(khz/1000, COMM_ARG1); in swd_set_clock()
[all …]
A Djtag.c81 writel(0, SGPIO_OUT); in jtag_init()
88 writel(x, SGPIO_OUT); in jtag_tick()
89 writel(x, SGPIO_OUT); in jtag_tick()
90 writel(x, SGPIO_OUT); in jtag_tick()
93 writel(x, SGPIO_OUT); in jtag_tick()
94 writel(x, SGPIO_OUT); in jtag_tick()
95 writel(x, SGPIO_OUT); in jtag_tick()
96 writel(x, SGPIO_OUT); in jtag_tick()
97 writel(x, SGPIO_OUT); in jtag_tick()
98 writel(x, SGPIO_OUT); in jtag_tick()
[all …]
A Dswo-uart1.c67 writel(0xFF, DMA_INTTCCLR); in lpc43xx_DMA_IRQ()
68 writel(0xFF, DMA_INTERRCLR); in lpc43xx_DMA_IRQ()
101 writel(DMA_CONFIG_EN, DMA_CONFIG); in swo_init()
109 writel(UART1_BASE + REG_RBR, DMA_SRC(0)); in swo_start_dma()
110 writel((u32) ptr, DMA_DST(0)); in swo_start_dma()
111 writel(0, DMA_LLI(0)); in swo_start_dma()
112 writel(DMA_XFER_SIZE(TXNSIZE) | in swo_start_dma()
124 writel(LCR_DLAB, UART_BASE + REG_LCR); in swo_config()
125 writel(div & 0xFF, UART_BASE + REG_DLL); in swo_config()
126 writel((div >> 8) & 0xFF, UART_BASE + REG_DLM); in swo_config()
[all …]
/lk-master/platform/lpc43xx/
A Dinit.c35 writel(PLL1_CTRL_PD, PLL1_CTRL); in platform_early_init()
38 writel(PLL0_CTRL_PD, PLL0USB_CTRL); in platform_early_init()
43 writel(1, XTAL_OSC_CTRL); in platform_early_init()
45 writel(0, XTAL_OSC_CTRL); in platform_early_init()
52 writel(cfg, PLL1_CTRL); in platform_early_init()
62 writel(cfg | PLL1_CTRL_DIRECT, PLL1_CTRL); in platform_early_init()
65 writel(0x01967FFA, PLL0USB_MDIV); in platform_early_init()
66 writel(0x00302062, PLL0USB_NP_DIV); in platform_early_init()
69 writel(cfg, PLL0USB_CTRL); in platform_early_init()
72 writel(cfg | PLL0_CTRL_CLKEN, PLL0USB_CTRL); in platform_early_init()
[all …]
A Ddebug.c68 writel(readl(DEMCR) | DEMCR_TRCENA, DEMCR); in lpc43xx_debug_early_init()
74 writel(2, TPI_SPPR); in lpc43xx_debug_early_init()
75 writel(0x100, TPI_FFCR); in lpc43xx_debug_early_init()
86 writel(LCR_DLAB, UART_BASE + REG_LCR); in lpc43xx_debug_early_init()
87 writel(4, UART_BASE + REG_DLL); in lpc43xx_debug_early_init()
88 writel(0, UART_BASE + REG_DLM); in lpc43xx_debug_early_init()
94 writel(LCR_DLAB, UART_BASE + REG_LCR); in lpc43xx_debug_early_init()
95 writel(div & 0xFF, UART_BASE + REG_DLL); in lpc43xx_debug_early_init()
100 writel(IER_RBRIE, UART_BASE + REG_IER); in lpc43xx_debug_early_init()
130 writel(c, UART_BASE + REG_THR); in platform_dputc()
[all …]
A Dudc.c156 writel(ept->bit, usb->base + USB_ENDPTFLUSH); in endpoint_flush()
167 writel(n, usb->base + USB_ENDPTCTRL(ept->num)); in endpoint_reset()
189 writel(n, usb->base + USB_ENDPTCTRL(ept->num)); in endpoint_enable()
337 writel(1, usb->base + USB_ENDPTSETUPSTAT); in handle_setup()
348 writel(CMD_RUN, usb->base + USB_CMD); in handle_setup()
457 writel(CMD_RST, usb->base + USB_CMD); in lpc43xx_usb_init()
468 writel(OTG_OT, usb->base + USB_OTGSC); in lpc43xx_usb_init()
480 writel(CMD_RUN, usb->base + USB_CMD); in usb_enable()
484 writel(CMD_STOP, usb->base + USB_CMD); in usb_enable()
498 writel(n, usb->base + USB_STS); in lpc43xx_USB0_IRQ()
[all …]
A Dgpio.c16 writel(readl(GPIO_DIR(m)) & (~(1 << n)), GPIO_DIR(m)); in gpio_config()
18 writel(readl(GPIO_DIR(m)) | (1 << n), GPIO_DIR(m)); in gpio_config()
24 writel(on, GPIO_WORD(nr)); in gpio_set()
/lk-master/platform/zynq/
A Dqspi.c102 writel(0, QSPI_ENABLE); in qspi_set_speed()
113 writel(1, QSPI_ENABLE); in qspi_set_speed()
119 writel(0, QSPI_ENABLE); in qspi_init()
139 writel(1, QSPI_ENABLE); in qspi_init()
152 writel(0, QSPI_ENABLE); in qspi_enable_linear()
162 writel(LCFG_ENABLE | in qspi_enable_linear()
171 writel(LCFG_ENABLE | in qspi_enable_linear()
179 writel(1, QSPI_ENABLE); in qspi_enable_linear()
193 writel(0, QSPI_ENABLE); in qspi_disable_linear()
201 writel(1, QSPI_ENABLE); in qspi_disable_linear()
[all …]
A Dfpga.c68 writel(readl(DEVCFG_MCTRL) & (~INT_PCAP_LPBK), DEVCFG_MCTRL); in zynq_program_fpga()
69 writel(readl(DEVCFG_CTRL) | PCAP_PR | PCAP_MODE, DEVCFG_CTRL); in zynq_program_fpga()
70 writel(0xffffffff, DEVCFG_INT_STS); in zynq_program_fpga()
71 writel(physaddr, DEVCFG_DMA_SRC_ADDR); in zynq_program_fpga()
72 writel(0xFFFFFFFF, DEVCFG_DMA_DST_ADDR); in zynq_program_fpga()
73 writel(length, DEVCFG_DMA_SRC_LEN); in zynq_program_fpga()
74 writel(length, DEVCFG_DMA_DST_LEN); in zynq_program_fpga()
107 writel(readl(DEVCFG_CTRL) & (~PCFG_PROG_B), DEVCFG_CTRL); in zynq_reset_fpga()
108 writel(readl(DEVCFG_CTRL) | PCFG_PROG_B, DEVCFG_CTRL); in zynq_reset_fpga()
/lk-master/app/lpcboot/
A Dlpc43xx-spifi.c24 writel(CMD_FF_SERIAL | CMD_FR_OP | CMD_OPCODE(CMD_WRITE_ENABLE), in spifi_write_enable()
31 writel(CMD_POLLBIT(0) | CMD_POLLCLR | CMD_POLL | in spifi_wait_busy()
41 writel(addr, SPIFI_ADDR); in spifi_page_program()
42 writel(CMD_DATALEN(count * 4) | CMD_FF_SERIAL | CMD_FR_OP_3B | in spifi_page_program()
45 writel(*ptr++, SPIFI_DATA); in spifi_page_program()
52 writel(addr, SPIFI_ADDR); in spifi_sector_erase()
60 writel(addr, SPIFI_ADDR); in spifi_verify_erased()
61 writel(CMD_DATALEN(count * 4) | CMD_FF_SERIAL | CMD_FR_OP_3B | in spifi_verify_erased()
73 writel(addr, SPIFI_ADDR); in spifi_verify_page()
88 writel(STAT_RESET, SPIFI_STAT); in spifi_init()
[all …]
A Dlpcboot.c154 writel(MAGIC1, MAGIC1_ADDR); in boot_app()
155 writel(MAGIC2, MAGIC2_ADDR); in boot_app()
/lk-master/platform/bcm28xx/
A Dminiuart.c92 writel(c, &regs->io); in uart_putc()
113 writel(MU_IIR_CLR_RECV_FIFO | MU_IIR_CLR_XMIT_FIFO, &mu_regs->iir); in uart_init()
118 writel(AUX_ENB_MINIUART, &aux_regs->auxenb); in uart_init()
121 writel(MU_IIR_EN_RX_IRQ, &mu_regs->ier); in uart_init()
140 writel(MU_IIR_CLR_XMIT_FIFO, &mu_regs->iir); in uart_flush_tx()
146 writel(MU_IIR_CLR_RECV_FIFO, &mu_regs->iir); in uart_flush_rx()
/lk-master/platform/stm32f4xx/
A Ddebug.c71 writel(n, DCRDR); in _debugmonitor()
/lk-master/top/include/lk/
A Dreg.h23 #define writel(v, a) (*REG32(a) = (v)) macro
/lk-master/platform/lpc43xx/include/platform/
A Dlpc43xx-gpio.h32 writel(flags, PIN_CFG(nr)); in pin_config()

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