Searched refs:DRAM1_BASE (Results 1 – 16 of 16) sorted by relevance
32 #ifdef DRAM1_BASE33 register_ddr(DRAM1_BASE, DRAM1_SIZE);
93 #define DRAM1_BASE 0x880000000UL macro110 #define DRAM1_BASE 0x880000000UL macro
47 #ifdef DRAM1_BASE48 register_ddr(DRAM1_BASE, DRAM1_SIZE);
205 #define DRAM1_BASE STM_SECDDR_END macro206 #define DRAM1_SIZE ((CFG_DDR_START - DRAM1_BASE) + CFG_DDR_SIZE)
46 #if defined(DRAM1_BASE)47 register_ddr(DRAM1_BASE, DRAM1_SIZE);
38 #define DRAM1_BASE 0x800000000 macro
70 #define DRAM1_BASE 0x51800000 macro
31 #define DRAM1_BASE 0x8080000000ULL macro
30 register_ddr(DRAM1_BASE, DRAM1_SIZE);
47 #define DRAM1_BASE 0x800000000 macro
75 register_ddr(DRAM1_BASE, CFG_DDR_SIZE - 0x80000000);
21 #define DRAM1_BASE 0x880000000 macro
37 register_ddr(DRAM1_BASE, DRAM1_SIZE);
110 #define DRAM1_BASE 0x40000000 macro
38 register_dynamic_shm(DRAM1_BASE, DRAM1_SIZE_NSEC);
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