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Searched refs:PL310_BASE (Results 1 – 13 of 13) sorted by relevance

/optee_os-3.20.0/core/arch/arm/plat-ti/
A Dti_pl310.c15 register_phys_mem_pgdir(MEM_AREA_IO_SEC, PL310_BASE, PL310_SIZE);
23 va = phys_to_virt(PL310_BASE, MEM_AREA_IO_SEC, in pl310_base()
28 return PL310_BASE; in pl310_base()
A Dplatform_config.h82 #define PL310_BASE (SCU_BASE + PL310_OFFSET) macro
/optee_os-3.20.0/core/arch/arm/plat-sam/
A Dsam_pl310.c38 register_phys_mem_pgdir(MEM_AREA_IO_SEC, PL310_BASE, CORE_MMU_PGDIR_SIZE);
46 va = phys_to_virt(PL310_BASE, MEM_AREA_IO_SEC, 1); in pl310_base()
49 return PL310_BASE; in pl310_base()
A Dplatform_config.h46 #define PL310_BASE (AT91C_BASE_L2CC) macro
/optee_os-3.20.0/core/arch/arm/plat-imx/
A Dimx_pl310.c25 register_phys_mem_pgdir(MEM_AREA_IO_SEC, PL310_BASE, CORE_MMU_PGDIR_SIZE);
83 return core_mmu_get_va(PL310_BASE, MEM_AREA_IO_SEC, 1); in pl310_base()
A Dmain.c96 ROUNDDOWN(PL310_BASE, CORE_MMU_PGDIR_SIZE),
/optee_os-3.20.0/core/arch/arm/plat-zynq7k/
A Dmain.c53 register_phys_mem_pgdir(MEM_AREA_IO_SEC, PL310_BASE, CORE_MMU_PGDIR_SIZE);
105 va = phys_to_virt(PL310_BASE, MEM_AREA_IO_SEC, 1); in pl310_base()
108 return PL310_BASE; in pl310_base()
A Dplatform_config.h37 #define PL310_BASE 0xF8F02000 macro
/optee_os-3.20.0/core/arch/arm/plat-stm/
A Dmain.c94 va = phys_to_virt(PL310_BASE, MEM_AREA_IO_SEC, 1); in pl310_base()
97 return PL310_BASE; in pl310_base()
A Dplatform_config.h46 #define PL310_BASE (CPU_IOMEM_BASE + 0x2000) macro
/optee_os-3.20.0/core/arch/arm/sm/
A Dpm.c48 arm_cl2_cleanbyway(core_mmu_get_va(PL310_BASE, MEM_AREA_IO_SEC, 1)); in sm_pm_cpu_suspend_save()
/optee_os-3.20.0/core/arch/arm/kernel/
A Dtz_ssvce_pl310_a32.S163 sub r0, r0, #(PL310_BASE - SCU_BASE)
167 add r0, r0, #(PL310_BASE - SCU_BASE)
/optee_os-3.20.0/core/arch/arm/plat-imx/registers/
A Dimx6.h79 #define PL310_BASE 0x00A02000 macro

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