Searched refs:dsb (Results 1 – 25 of 33) sorted by relevance
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12 dsb ishst /* Sync with table update */14 dsb ish /* Sync with tlb invalidation completion */21 dsb ishst /* Sync with table update */23 dsb ish /* Sync with tlb invalidation completion */30 dsb ishst /* Sync with table update */34 dsb ish /* Sync with tlb invalidation completion */
12 dsb ishst /* Sync with table update */14 dsb ish /* Sync with tlb invalidation completion */22 dsb ishst /* Sync with table update */24 dsb ish /* Sync with tlb invalidation completion */32 dsb ishst /* Sync with table update */36 dsb ish /* Sync with tlb invalidation completion */
43 dsb sy144 dsb sy // ensure completion of previous cache maintenance instruction149 dsb sy239 dsb ishst /* ensure that maintenance operations are seen */264 dsb ishst
38 dsb sy127 dsb sy // barrier before we start this level152 dsb sy // barrier to complete final cache operation220 dsb ish /* ensure that maintenance operations are seen */236 dsb ish
11 dsb(); in cpu_idle()
76 dsb
166 dsb
102 dsb(); in imx_pen_lock()105 dsb(); in imx_pen_lock()111 dsb(); in imx_pen_lock()114 dsb(); in imx_pen_lock()132 dsb(); in imx_pen_unlock()
62 dsb65 dsb76 dsb99 dsb116 dsb151 dsb163 dsb179 dsb692 dsb754 dsb @ ; synchronise
62 dsb94 dsb106 dsb124 dsb132 dsb522 dsb586 dsb623 dsb680 dsb @ ; synchronise
175 dsb(); in psci_system_off()
57 dsb(); in psci_cpu_on()87 dsb(); in psci_system_reset()
276 dsb(); in psci_cpu_on()282 dsb(); in psci_cpu_on()294 dsb(); in psci_cpu_on()297 dsb(); in psci_cpu_on()340 dsb(); in psci_system_reset()344 dsb(); in psci_system_reset()
19 dsb(); in caam_udelay()
39 dsb
195 dsb
63 dsb(); in dcp_udelay()
66 dsb ish /* ensure that maintenance operations are seen */
73 dsb(); in imx_wdog_restart()
76 dsb(); in ocotp_ctrl_wait_for()
89 dsb(); in plat_primary_init_early()
98 dsb(); in stm32_pm_cpu_power_down_wfi()
62 dsb(); in plat_primary_init_early()
177 static inline __noprof void dsb(void) in dsb() function
1210 dsb(); /* Make sure the write above is visible */ in core_mmu_set_user_map()1218 dsb(); /* Make sure the write above is visible */ in core_mmu_set_user_map()1296 dsb(); /* Make sure the write above is visible */ in core_mmu_set_user_map()1304 dsb(); /* Make sure the write above is visible */ in core_mmu_set_user_map()
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