Home
last modified time | relevance | path

Searched refs:id (Results 1 – 25 of 124) sorted by relevance

12345

/optee_os-3.20.0/core/lib/libtomcrypt/src/pk/asn1/der/general/
A Dder_decode_asn1_identifier.c65 LTC_ARGCHK(id != NULL); in der_decode_asn1_identifier()
76 id->tag = in[0] & 0x1f; in der_decode_asn1_identifier()
79 if (id->tag == 0x1f) { in der_decode_asn1_identifier()
80 id->tag = 0; in der_decode_asn1_identifier()
87 id->tag <<= 7; in der_decode_asn1_identifier()
101 id->pc = 0; in der_decode_asn1_identifier()
102 id->klass = 0; in der_decode_asn1_identifier()
103 id->tag = 0; in der_decode_asn1_identifier()
109 (id->pc == tag_constructed_map[id->tag])) { in der_decode_asn1_identifier()
110 id->type = der_asn1_tag_to_type_map[id->tag]; in der_decode_asn1_identifier()
[all …]
A Dder_encode_asn1_identifier.c23 LTC_ARGCHK(id != NULL); in der_encode_asn1_identifier()
26 if (id->type != LTC_ASN1_CUSTOM_TYPE) { in der_encode_asn1_identifier()
30 if (der_asn1_type_to_identifier_map[id->type] == -1) { in der_encode_asn1_identifier()
34 *out = der_asn1_type_to_identifier_map[id->type]; in der_encode_asn1_identifier()
39 if (id->klass < LTC_ASN1_CL_UNIVERSAL || id->klass > LTC_ASN1_CL_PRIVATE) { in der_encode_asn1_identifier()
42 if (id->pc < LTC_ASN1_PC_PRIMITIVE || id->pc > LTC_ASN1_PC_CONSTRUCTED) { in der_encode_asn1_identifier()
45 if (id->tag > (ULONG_MAX >> (8 + 7))) { in der_encode_asn1_identifier()
54 out[0] = id->klass << 6 | id->pc << 5; in der_encode_asn1_identifier()
57 if (id->tag < 0x1f) { in der_encode_asn1_identifier()
59 out[0] |= id->tag & 0x1f; in der_encode_asn1_identifier()
[all …]
/optee_os-3.20.0/core/drivers/clk/sam/
A Dsama5d2_clk.c24 uint8_t id; member
64 { .n = "ddrck", .id = 2 },
65 { .n = "lcdck", .id = 3 },
66 { .n = "uhpck", .id = 6 },
460 pmc_clk->id = PMC_MCK; in pmc_setup()
498 pmc_clk->id = sam_clk->id; in pmc_setup()
520 pmc_clk->id = sam_clk->id; in pmc_setup()
536 pmc_clk->id = sam_clk->id; in pmc_setup()
552 pmc_clk->id = sam_clk->id; in pmc_setup()
567 sam_clk->id, in pmc_setup()
[all …]
A Dat91_system.c21 uint8_t id; member
24 static bool is_pck(int id) in is_pck() argument
26 return (id >= 8) && (id <= 15); in is_pck()
29 static bool clk_system_ready(vaddr_t base, int id) in clk_system_ready() argument
33 return status & BIT(id); in clk_system_ready()
40 io_write32(sys->base + AT91_PMC_SCER, 1 << sys->id); in clk_system_enable()
42 if (!is_pck(sys->id)) in clk_system_enable()
45 while (!clk_system_ready(sys->base, sys->id)) in clk_system_enable()
65 struct clk *parent, uint8_t id) in at91_clk_register_system() argument
70 if (!parent || id > SYSTEM_MAX_ID) in at91_clk_register_system()
[all …]
A Dat91_pll.c16 #define PLL_STATUS_MASK(id) BIT(1 + (id)) argument
17 #define PLL_REG(id) (AT91_CKGR_PLLAR + ((id) * 4)) argument
30 #define PLL_ICPR_SHIFT(id) ((id) * 16) argument
31 #define PLL_ICPR_MASK(id) (0xffff << PLL_ICPR_SHIFT(id)) argument
39 uint8_t id; member
59 uint8_t id = pll->id; in clk_pll_enable() local
61 int offset = PLL_REG(id); in clk_pll_enable()
83 PLL_ICPR_SHIFT(id)); in clk_pll_enable()
263 int offset = PLL_REG(id); in at91_clk_register_pll()
273 if (id > PLL_MAX_ID) in at91_clk_register_pll()
[all …]
A Dat91_peripheral.c17 #define PERIPHERAL_MASK(id) BIT((id) & PERIPHERAL_ID_MASK) argument
24 uint32_t id; member
60 if (periph->id < PERIPHERAL_ID_MIN) in clk_sam9x5_peripheral_enable()
64 (periph->id & periph->layout->pid_mask)); in clk_sam9x5_peripheral_enable()
79 if (periph->id < PERIPHERAL_ID_MIN) in clk_sam9x5_peripheral_disable()
83 (periph->id & periph->layout->pid_mask)); in clk_sam9x5_peripheral_disable()
96 if (periph->id < PERIPHERAL_ID_MIN) in clk_sam9x5_peripheral_get_rate()
100 periph->id & periph->layout->pid_mask); in clk_sam9x5_peripheral_get_rate()
152 uint32_t id, const struct clk_range *range) in at91_clk_register_sam9x5_periph() argument
170 periph->id = id; in at91_clk_register_sam9x5_periph()
[all …]
A Dat91_programmable.c17 #define PROG_STATUS_MASK(id) (1 << ((id) + 8)) argument
28 uint8_t id; member
37 unsigned int pckr = io_read32(prog->base + AT91_PMC_PCKR(prog->id)); in clk_programmable_get_rate()
65 io_clrsetbits32(prog->base + AT91_PMC_PCKR(prog->id), mask, pckr); in clk_programmable_set_parent()
74 unsigned int pckr = io_read32(prog->base + AT91_PMC_PCKR(prog->id)); in clk_programmable_get_parent()
119 io_clrsetbits32(prog->base + AT91_PMC_PCKR(prog->id), in clk_programmable_set_rate()
136 uint8_t num_parents, uint8_t id, in at91_clk_register_programmable() argument
142 assert(id <= PROG_ID_MAX); in at91_clk_register_programmable()
149 prog->id = id; in at91_clk_register_programmable()
162 pmc_register_pck(id); in at91_clk_register_programmable()
/optee_os-3.20.0/ta/pkcs11/src/
A Dpkcs11_helpers.h80 return pkcs11_attr2boolprop_shift(id) >= 0; in pkcs11_attr_is_boolean()
85 const char *id2str_ta_cmd(uint32_t id);
86 const char *id2str_rc(uint32_t id);
87 const char *id2str_slot_flag(uint32_t id);
88 const char *id2str_token_flag(uint32_t id);
91 const char *id2str_attr(uint32_t id);
92 const char *id2str_class(uint32_t id);
94 const char *id2str_key_type(uint32_t id);
97 const char *id2str_proc(uint32_t id);
98 const char *id2str_function(uint32_t id);
[all …]
A Dpkcs11_helpers.c20 uint32_t id; member
104 uint32_t id; member
117 #define PKCS11_ID(_id) { .id = _id }
120 #define ID2STR(id, table, prefix) \ argument
132 if (id != table[n].id) in id2str()
412 if (id == attr_ids[n].id) in valid_pkcs11_attribute_id()
422 switch (id) { in pkcs11_attr_is_type()
714 const char *id2str_rc(uint32_t id) in id2str_rc() argument
749 if (id == attr_ids[n].id) { in id2str_attr()
803 switch (id) { in id2str_attr_value()
[all …]
A Dtoken_capabilities.h17 bool mechanism_is_valid(enum pkcs11_mechanism_id id);
20 const char *mechanism_string_id(enum pkcs11_mechanism_id id);
25 uint32_t mechanism_supported_flags(enum pkcs11_mechanism_id id);
35 static inline bool mechanism_is_supported(enum pkcs11_mechanism_id id) in mechanism_is_supported() argument
37 return mechanism_supported_flags(id) != 0; in mechanism_is_supported()
A Dattributes.c78 if (pkcs11_ref.id != attribute) in _remove_attribute()
122 if (pkcs11_ref.id != attribute) in get_attribute_ptrs()
223 rc = set_attribute(dst, cli_head.id, in modify_attributes_list()
358 pkcs11_ref.id, pkcs11_ref.size); in __trace_attributes()
363 id2str_attr_value(pkcs11_ref.id, in __trace_attributes()
371 id2str_attr_value(pkcs11_ref.id, in __trace_attributes()
380 id2str_attr_value(pkcs11_ref.id, in __trace_attributes()
383 pkcs11_ref.id, pkcs11_ref.size, in __trace_attributes()
392 pkcs11_ref.id, pkcs11_ref.size, in __trace_attributes()
401 pkcs11_ref.id, pkcs11_ref.size, in __trace_attributes()
[all …]
A Dsanitize_object.c89 if (cli_ref.id == PKCS11_CKA_CLASS) { in sanitize_class_and_type()
111 if (pkcs11_attr_is_type(cli_ref.id)) { in sanitize_class_and_type()
191 idx = pkcs11_attr2boolprop_shift(cli_ref.id); in sanitize_boolprops()
215 rc = add_attribute(dst, cli_ref.id, &pkcs11_bool, in sanitize_boolprops()
242 rc = add_attribute(dst, cli_ref->id, obj2, in sanitize_indirect_attr()
287 if (cli_ref.id == PKCS11_CKA_CLASS || in sanitize_client_object()
288 pkcs11_attr_is_type(cli_ref.id) || in sanitize_client_object()
289 pkcs11_attr_is_boolean(cli_ref.id)) in sanitize_client_object()
348 prefix, id2str_attr(pkcs11_ref.id), in __trace_attributes()
351 pkcs11_ref.id, pkcs11_ref.size); in __trace_attributes()
[all …]
/optee_os-3.20.0/core/arch/arm/plat-stm32mp1/
A Dshared_resources.c176 shres2str_id(id), in register_periph()
186 switch (id) { in register_periph()
205 shres_state[id] = state; in register_periph()
209 switch (id) { in register_periph()
287 id = STM32MP1_SHRES_RTC; in register_periph_iomem()
556 switch (id) { in mckprot_resource()
571 if (mckprot_resource(id)) in shres2decprot_attr()
634 for (id = 0; id < STM32MP1_SHRES_COUNT; id++) { in check_rcc_secure_configuration()
642 shres2str_id(id), id); in check_rcc_secure_configuration()
679 for (id = (enum stm32mp_shres)0; id < STM32MP1_SHRES_COUNT; id++) { in stm32mp1_init_final_shres()
[all …]
/optee_os-3.20.0/core/tee/
A Dtee_fs_rpc.c72 .id = id, .num_params = 3, .params = { in operation_open_dfh()
87 TEE_Result tee_fs_rpc_open_dfh(uint32_t id, in tee_fs_rpc_open_dfh() argument
93 TEE_Result tee_fs_rpc_create_dfh(uint32_t id, in tee_fs_rpc_create_dfh() argument
103 .id = id, .num_params = 1, .params = { in tee_fs_rpc_close()
112 uint32_t id, int fd, tee_fs_off_t offset, in tee_fs_rpc_read_init() argument
128 .id = id, .num_params = 2, .params = { in tee_fs_rpc_read_init()
151 uint32_t id, int fd, tee_fs_off_t offset, in tee_fs_rpc_write_init() argument
167 .id = id, .num_params = 2, .params = { in tee_fs_rpc_write_init()
187 .id = id, .num_params = 1, .params = { in tee_fs_rpc_truncate()
196 TEE_Result tee_fs_rpc_remove_dfh(uint32_t id, in tee_fs_rpc_remove_dfh() argument
[all …]
/optee_os-3.20.0/core/include/kernel/
A Dlockdep.h58 uintptr_t id);
61 uintptr_t id);
63 uintptr_t id);
83 uintptr_t id) in lockdep_lock_acquire() argument
85 TEE_Result res = __lockdep_lock_acquire(graph, owned, id); in lockdep_lock_acquire()
102 uintptr_t id) in lockdep_lock_tryacquire() argument
118 uintptr_t id) in lockdep_lock_release() argument
120 TEE_Result res = __lockdep_lock_release(owned, id); in lockdep_lock_release()
140 uintptr_t id __unused) in lockdep_lock_acquire()
144 uintptr_t id __unused) in lockdep_lock_release()
[all …]
/optee_os-3.20.0/core/arch/arm/plat-stm32mp1/drivers/
A Dstm32mp1_pwr.c51 unsigned int stm32mp1_pwr_regulator_mv(enum pwr_regulator id) in stm32mp1_pwr_regulator_mv() argument
53 assert(id < PWR_REGU_COUNT); in stm32mp1_pwr_regulator_mv()
55 return pwr_regulators[id].level_mv; in stm32mp1_pwr_regulator_mv()
58 void stm32mp1_pwr_regulator_set_state(enum pwr_regulator id, bool enable) in stm32mp1_pwr_regulator_set_state() argument
61 uint32_t enable_mask = pwr_regulators[id].cr3_enable_mask; in stm32mp1_pwr_regulator_set_state()
63 assert(id < PWR_REGU_COUNT); in stm32mp1_pwr_regulator_set_state()
67 uint32_t ready_mask = pwr_regulators[id].cr3_ready_mask; in stm32mp1_pwr_regulator_set_state()
82 bool stm32mp1_pwr_regulator_is_enabled(enum pwr_regulator id) in stm32mp1_pwr_regulator_is_enabled() argument
84 assert(id < PWR_REGU_COUNT); in stm32mp1_pwr_regulator_is_enabled()
87 pwr_regulators[id].cr3_enable_mask; in stm32mp1_pwr_regulator_is_enabled()
A Dstm32mp1_pwr.h30 unsigned int stm32mp1_pwr_regulator_mv(enum pwr_regulator id);
31 void stm32mp1_pwr_regulator_set_state(enum pwr_regulator id, bool enable);
32 bool stm32mp1_pwr_regulator_is_enabled(enum pwr_regulator id);
/optee_os-3.20.0/core/include/tee/
A Dtee_fs_rpc.h20 uint32_t id; member
27 TEE_Result tee_fs_rpc_open_dfh(uint32_t id,
29 TEE_Result tee_fs_rpc_create_dfh(uint32_t id,
32 TEE_Result tee_fs_rpc_close(uint32_t id, int fd);
35 uint32_t id, int fd, tee_fs_off_t offset,
41 uint32_t id, int fd, tee_fs_off_t offset,
46 TEE_Result tee_fs_rpc_truncate(uint32_t id, int fd, size_t len);
47 TEE_Result tee_fs_rpc_remove_dfh(uint32_t id,
/optee_os-3.20.0/core/drivers/rstctrl/
A Dstm32_rstctrl.c24 unsigned int id; member
32 static size_t reset_id2reg_offset(unsigned int id) in reset_id2reg_offset() argument
57 unsigned int id = to_rstline(rstctrl)->id; in reset_assert() local
62 switch (id) { in reset_assert()
79 offset = reset_id2reg_offset(id); in reset_assert()
80 bit_mask = BIT(reset_id2reg_bit_pos(id)); in reset_assert()
100 unsigned int id = to_rstline(rstctrl)->id; in reset_deassert() local
105 switch (id) { in reset_deassert()
122 bit_mask = BIT(reset_id2reg_bit_pos(id)); in reset_deassert()
150 if (stm32_rstline->id == control_id) in find_rstctrl_device()
[all …]
/optee_os-3.20.0/core/drivers/crypto/se050/adaptors/utils/
A Dscp_config.c174 *id = SE050A1; in get_id_from_ofid()
177 *id = SE050A2; in get_id_from_ofid()
180 *id = SE050B1; in get_id_from_ofid()
183 *id = SE050B2; in get_id_from_ofid()
186 *id = SE050C1; in get_id_from_ofid()
189 *id = SE050C2; in get_id_from_ofid()
204 *id = SE050E; in get_id_from_ofid()
207 *id = SE051A; in get_id_from_ofid()
210 *id = SE051C; in get_id_from_ofid()
213 *id = SE051W; in get_id_from_ofid()
[all …]
/optee_os-3.20.0/core/include/
A Dscattered_array.h30 #define __SCT_ARRAY_DEF_ITEM2(array_name, order, id, element_type) \ argument
32 __scattered_array_ ## id ## array_name, \
35 #define __SCT_ARRAY_DEF_PG_ITEM2(array_name, order, id, element_type) \ argument
37 __scattered_array_ ## id ## array_name, \
40 #define __SCT_ARRAY_DEF_ITEM1(array_name, order, id, element_type) \ argument
41 __SCT_ARRAY_DEF_ITEM2(array_name, order, id, element_type)
43 #define __SCT_ARRAY_DEF_PG_ITEM1(array_name, order, id, element_type) \ argument
44 __SCT_ARRAY_DEF_PG_ITEM2(array_name, order, id, element_type)
/optee_os-3.20.0/core/drivers/crypto/versal/
A Dipi.c21 static TEE_Result versal_sha3_request(enum versal_crypto_api id, in versal_sha3_request() argument
28 cmd.data[0] = CRYPTO_API_ID(id); in versal_sha3_request()
50 static TEE_Result versal_aes_update_aad_request(enum versal_crypto_api id, in versal_aes_update_aad_request() argument
59 cmd.data[0] = CRYPTO_API_ID(id); in versal_aes_update_aad_request()
69 TEE_Result versal_crypto_request(enum versal_crypto_api id, in versal_crypto_request() argument
77 if (id == VERSAL_SHA3_UPDATE) in versal_crypto_request()
78 return versal_sha3_request(id, arg); in versal_crypto_request()
80 if (id == VERSAL_AES_UPDATE_AAD) in versal_crypto_request()
81 return versal_aes_update_aad_request(id, arg); in versal_crypto_request()
83 cmd.data[0] = CRYPTO_API_ID(id); in versal_crypto_request()
/optee_os-3.20.0/core/lib/libtomcrypt/src/pk/asn1/oid/
A Dpk_get_oid.c8 enum ltc_oid_id id; member
25 int pk_get_oid(enum ltc_oid_id id, const char **st) in pk_get_oid() argument
30 if (pka_oids[i].id == id) { in pk_get_oid()
/optee_os-3.20.0/core/arch/arm/include/
A Doptee_ffa.h33 #define OPTEE_FFA_BLOCKING_CALL(id) UINT32_C(id) argument
35 #define OPTEE_FFA_YIELDING_CALL(id) (UINT32_C(id) | \ argument
/optee_os-3.20.0/core/drivers/
A Dzynqmp_pm.c103 enum zynqmp_efuse_id id, bool puf) in efuse_op() argument
114 if (id >= ARRAY_SIZE(efuse_tbl)) { in efuse_op()
135 efuse_op->size = efuse_tbl[id].bytes / sizeof(uint32_t); in efuse_op()
136 efuse_op->offset = efuse_tbl[id].offset; in efuse_op()
172 TEE_Result zynqmp_efuse_read(uint8_t *buf, size_t sz, enum zynqmp_efuse_id id, in zynqmp_efuse_read() argument
175 return efuse_op(EFUSE_READ, buf, sz, id, puf); in zynqmp_efuse_read()
178 TEE_Result zynqmp_efuse_write(uint8_t *buf, size_t sz, enum zynqmp_efuse_id id, in zynqmp_efuse_write() argument
181 return efuse_op(EFUSE_WRITE, buf, sz, id, puf); in zynqmp_efuse_write()

Completed in 26 milliseconds

12345