/optee_os-3.20.0/core/drivers/ |
A D | stm32_gpio.c | 81 if (pin < GPIO_ALT_LOWER_LIMIT) in get_gpio_cfg() 103 GPIO_MODE_MASK << (pin << 1), in set_gpio_cfg() 104 cfg->mode << (pin << 1)); in set_gpio_cfg() 107 io_clrsetbits32(base + GPIO_OTYPER_OFFSET, BIT(pin), cfg->otype << pin); in set_gpio_cfg() 112 cfg->ospeed << (pin << 1)); in set_gpio_cfg() 116 cfg->pupd << (pin << 1)); in set_gpio_cfg() 122 cfg->af << (pin << 2)); in set_gpio_cfg() 132 io_clrsetbits32(base + GPIO_ODR_OFFSET, BIT(pin), cfg->od << pin); in set_gpio_cfg() 232 uint32_t pin = 0; in get_pinctrl_from_fdt() local 287 ref->pin = (uint8_t)pin; in get_pinctrl_from_fdt() [all …]
|
A D | versal_gpio.c | 74 uint32_t *bank, uint32_t *pin) in versal_gpio_get_pin() argument 102 uint32_t pin = 0; in gpio_get_value() local 104 versal_gpio_get_pin(chip, gpio, &bank, &pin); in gpio_get_value() 114 uint32_t pin = 0; in gpio_set_value() local 130 val = ~BIT32(pin + VERSAL_GPIO_MID_PIN) & in gpio_set_value() 141 uint32_t pin = 0; in gpio_set_direction() local 148 reg |= BIT(pin); in gpio_set_direction() 154 reg |= BIT(pin); in gpio_set_direction() 161 assert(!(bank == 0 && (pin == 7 || pin == 8))); in gpio_set_direction() 164 reg &= ~BIT(pin); in gpio_set_direction() [all …]
|
A D | bcm_gpio.c | 20 #define GPIO_BANK(pin) ((pin) / NGPIOS_PER_BANK) argument 22 #define IPROC_GPIO_REG(pin, reg) ((reg) + \ argument 23 GPIO_BANK(pin) * GPIO_BANK_SIZE) 25 #define IPROC_GPIO_SHIFT(pin) ((pin) % NGPIOS_PER_BANK) argument 29 #define IPROC_GPIO_SEC_CFG_REG(pin) \ argument 30 (((GPIO_BANK_CNT - 1) - GPIO_BANK(pin)) * SEC_GPIO_SIZE) 34 struct bcm_gpio_chip *bcm_gpio_pin_to_chip(unsigned int pin) in bcm_gpio_pin_to_chip() argument 39 if ((pin >= gc->gpio_base) && in bcm_gpio_pin_to_chip() 40 (pin < (gc->gpio_base + gc->ngpios))) in bcm_gpio_pin_to_chip()
|
A D | ls_sfp.c | 153 uint32_t pin = gpio_info.gpio_pin; in ls_sfp_program_fuses() local 161 (uint32_t)gpio_info.gpio_chip.gpio_controller, pin); in ls_sfp_program_fuses() 162 gc->ops->set_direction(gc, pin, GPIO_DIR_OUT); in ls_sfp_program_fuses() 163 gc->ops->set_value(gc, pin, GPIO_LEVEL_HIGH); in ls_sfp_program_fuses() 165 if (gc->ops->get_value(gc, pin) != GPIO_LEVEL_HIGH) { in ls_sfp_program_fuses() 195 (uint32_t)gpio_info.gpio_chip.gpio_controller, pin); in ls_sfp_program_fuses() 196 gc->ops->set_value(gc, pin, GPIO_LEVEL_LOW); in ls_sfp_program_fuses() 197 gc->ops->set_direction(gc, pin, GPIO_DIR_IN); in ls_sfp_program_fuses()
|
A D | stm32_uart.c | 119 pd->pinctrl[n].pin); in register_secure_uart() 129 pd->pinctrl[n].pin); in register_non_secure_uart()
|
A D | atmel_piobu.c | 22 #define SECUMOD_PIN_VAL(pin) BIT(SECUMOD_PIN_SHIFT + (pin)) argument
|
A D | stm32_i2c.c | 839 hi2c->pinctrl->pin, true); in stm32_i2c_init() 1541 hi2c->pinctrl->pin, true); in stm32_i2c_resume()
|
/optee_os-3.20.0/core/include/drivers/ |
A D | stm32_gpio.h | 71 uint8_t pin; member 121 void stm32_gpio_set_output_level(unsigned int bank, unsigned int pin, int high); 132 stm32_gpio_set_output_level(pinctrl->bank, pinctrl->pin, high); in stm32_pinctrl_set_gpio_level() 142 int stm32_gpio_get_input_level(unsigned int bank, unsigned int pin); 152 return stm32_gpio_get_input_level(pinctrl->bank, pinctrl->pin); in stm32_pinctrl_get_gpio_level() 163 void stm32_gpio_set_secure_cfg(unsigned int bank, unsigned int pin, 167 unsigned int pin __unused, in stm32_gpio_set_secure_cfg()
|
A D | bcm_gpio.h | 30 struct bcm_gpio_chip *bcm_gpio_pin_to_chip(unsigned int pin);
|
/optee_os-3.20.0/core/arch/arm/plat-stm32mp1/ |
A D | shared_resources.c | 359 assert(pin < get_gpioz_nbpin()); in stm32mp_register_secure_gpio() 372 assert(pin < get_gpioz_nbpin()); in stm32mp_register_non_secure_gpio() 395 unsigned int pin = 0; in stm32mp_gpio_bank_is_shared() local 402 for (pin = 0; pin < get_gpioz_nbpin(); pin++) in stm32mp_gpio_bank_is_shared() 412 unsigned int pin = 0; in stm32mp_gpio_bank_is_non_secure() local 419 for (pin = 0; pin < get_gpioz_nbpin(); pin++) in stm32mp_gpio_bank_is_non_secure() 429 unsigned int pin = 0; in stm32mp_gpio_bank_is_secure() local 436 for (pin = 0; pin < get_gpioz_nbpin(); pin++) in stm32mp_gpio_bank_is_secure() 653 unsigned int pin = 0; in set_gpio_secure_configuration() local 655 for (pin = 0; pin < get_gpioz_nbpin(); pin++) { in set_gpio_secure_configuration() [all …]
|
A D | stm32_util.h | 248 void stm32mp_register_secure_gpio(unsigned int bank, unsigned int pin); 255 void stm32mp_register_non_secure_gpio(unsigned int bank, unsigned int pin); 294 unsigned int pin __unused) in stm32mp_register_secure_gpio() 299 unsigned int pin __unused) in stm32mp_register_non_secure_gpio()
|
A D | main.c | 272 unsigned int pin = 0; in set_all_gpios_non_secure() local 288 for (pin = 0; pin <= nb_pin_bank; pin++) in set_all_gpios_non_secure() 289 stm32_gpio_set_secure_cfg(bank, pin, false); in set_all_gpios_non_secure()
|
/optee_os-3.20.0/ta/pkcs11/src/ |
A D | persistent_token.c | 74 static enum pkcs11_rc do_hash(uint32_t user, const uint8_t *pin, in do_hash() argument 88 res = TEE_DigestDoFinal(oh, pin, pin_size, hash, &sz); in do_hash() 98 enum pkcs11_rc hash_pin(enum pkcs11_user_type user, const uint8_t *pin, in hash_pin() argument 109 rc = do_hash(user, pin, pin_size, s, hash); in hash_pin() 115 enum pkcs11_rc verify_pin(enum pkcs11_user_type user, const uint8_t *pin, in verify_pin() argument 122 rc = do_hash(user, pin, pin_size, salt, tmp_hash); in verify_pin() 155 const uint8_t *pin, in setup_identity_auth_from_pin() argument 168 if (!pin) { in setup_identity_auth_from_pin() 183 TEE_MemMove(acl_string, pin, pin_size); in setup_identity_auth_from_pin()
|
A D | pkcs11_token.h | 218 enum pkcs11_rc hash_pin(enum pkcs11_user_type user, const uint8_t *pin, 221 enum pkcs11_rc verify_pin(enum pkcs11_user_type user, const uint8_t *pin, 229 const uint8_t *pin, 243 const uint8_t *pin __unused, in setup_identity_auth_from_pin()
|
A D | pkcs11_token.c | 820 void *pin = NULL; in entry_ck_token_initialize() local 871 if (!pin) { in entry_ck_token_initialize() 894 rc = hash_pin(PKCS11_CKU_SO, pin, pin_size, in entry_ck_token_initialize() 903 rc = verify_pin(PKCS11_CKU_SO, pin, pin_size, in entry_ck_token_initialize() 1043 void *pin = NULL; in entry_ck_init_pin() local 1076 uint8_t *pin, size_t pin_size) in check_so_pin() argument 1090 rc = verify_pin(PKCS11_CKU_SO, pin, pin_size, in check_so_pin() 1134 uint8_t *pin, size_t pin_size) in check_user_pin() argument 1206 void *pin = NULL; in entry_ck_set_pin() local 1353 void *pin = NULL; in entry_ck_login() local [all …]
|
/optee_os-3.20.0/core/arch/arm/plat-stm32mp1/drivers/ |
A D | stm32mp1_pmic.c | 597 i2c_handle.pinctrl[n].pin); in register_non_secure_pmic() 608 i2c_handle.pinctrl[n].pin); in register_secure_pmic()
|
/optee_os-3.20.0/core/arch/arm/dts/ |
A D | at91-sama5d2_xplained.dts | 424 * There is no real pinmux for ADC, if the pin 430 * state when the pin is not muxed to the adc. 450 * The ADTRG pin can work on any edge type.
|
A D | stm32mp131.dtsi | 252 pinctrl: pin-controller@50002000 {
|