Searched refs:register_ddr (Results 1 – 16 of 16) sorted by relevance
| /optee_os-3.20.0/core/arch/arm/plat-rcar/ |
| A D | main.c | 52 register_ddr(NSEC_DDR_0_BASE, NSEC_DDR_0_SIZE);
53 register_ddr(NSEC_DDR_1_BASE, NSEC_DDR_1_SIZE);
55 register_ddr(NSEC_DDR_2_BASE, NSEC_DDR_2_SIZE);
58 register_ddr(NSEC_DDR_3_BASE, NSEC_DDR_3_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-zynqmp/ |
| A D | main.c | 74 register_ddr(DRAM0_BASE, 0x80000000);
75 register_ddr(DRAM1_BASE, CFG_DDR_SIZE - 0x80000000);
77 register_ddr(DRAM0_BASE, CFG_DDR_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-totalcompute/ |
| A D | main.c | 29 register_ddr(DRAM0_BASE, DRAM0_SIZE);
30 register_ddr(DRAM1_BASE, DRAM1_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-corstone1000/ |
| A D | main.c | 18 register_ddr(DRAM0_BASE, DRAM0_SIZE);
19 register_ddr(MM_COMM_BUF_BASE, MM_COMM_BUF_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-versal/ |
| A D | main.c | 44 register_ddr(DRAM0_BASE, DRAM0_SIZE);
47 register_ddr(DRAM1_BASE, DRAM1_SIZE);
48 register_ddr(DRAM2_BASE, DRAM2_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-uniphier/ |
| A D | main.c | 30 register_ddr(DRAM0_BASE, DRAM0_SIZE);
33 register_ddr(DRAM1_BASE, DRAM1_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-k3/ |
| A D | main.c | 36 register_ddr(DRAM0_BASE, DRAM0_SIZE);
37 register_ddr(DRAM1_BASE, DRAM1_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-stm/ |
| A D | main.c | 30 register_ddr(DRAM0_BASE, DRAM0_SIZE);
33 register_ddr(DRAM1_BASE, DRAM1_SIZE);
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| /optee_os-3.20.0/core/arch/riscv/plat-virt/ |
| A D | main.c | 16 register_ddr(DRAM_BASE, DRAM_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-mediatek/ |
| A D | main.c | 20 register_ddr(CFG_DRAM_BASE, CFG_DRAM_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-ls/ |
| A D | main.c | 67 register_ddr(CFG_DRAM0_BASE, (CFG_TZDRAM_START - CFG_DRAM0_BASE));
69 register_ddr(CFG_DRAM1_BASE, CFG_DRAM1_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-vexpress/ |
| A D | main.c | 45 register_ddr(DRAM0_BASE, DRAM0_SIZE);
48 register_ddr(DRAM1_BASE, DRAM1_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-rzn1/ |
| A D | main.c | 37 register_ddr(DRAM_BASE, DRAM_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-aspeed/ |
| A D | platform_ast2600.c | 59 register_ddr(CFG_DRAM_BASE, CFG_DRAM_SIZE);
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| /optee_os-3.20.0/core/include/mm/ |
| A D | core_mmu.h | 242 #define register_ddr(addr, size) \ macro
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| /optee_os-3.20.0/core/arch/arm/plat-stm32mp1/ |
| A D | main.c | 55 register_ddr(DDR_BASE, CFG_DRAM_SIZE);
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