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Searched refs:x86KScacheLineSizeBits (Results 1 – 4 of 4) sorted by relevance

/seL4-master/src/arch/x86/machine/
A Dhardware.c78 for (v = ROUND_DOWN((word_t)vaddr, x86KScacheLineSizeBits); in flushCacheRange()
80 v += BIT(x86KScacheLineSizeBits)) { in flushCacheRange()
/seL4-master/src/arch/x86/model/
A Dstatedata.c40 uint32_t x86KScacheLineSizeBits; variable
/seL4-master/include/arch/x86/arch/model/
A Dstatedata.h70 extern uint32_t x86KScacheLineSizeBits;
/seL4-master/src/arch/x86/kernel/
A Dvspace.c480 x86KScacheLineSizeBits = getCacheLineSizeBits(); in init_vm_state()
481 if (!x86KScacheLineSizeBits) { in init_vm_state()
485 cacheLineSize = BIT(x86KScacheLineSizeBits); in init_vm_state()

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