| /xen-4.10.0-shim-comet/xen/arch/arm/ |
| A D | cpufeature.c | 26 void update_cpu_capabilities(const struct arm_cpu_capabilities *caps, in update_cpu_capabilities() argument
31 for ( i = 0; caps[i].matches; i++ ) in update_cpu_capabilities()
33 if ( !caps[i].matches(&caps[i]) ) in update_cpu_capabilities()
36 if ( !cpus_have_cap(caps[i].capability) && caps[i].desc ) in update_cpu_capabilities()
37 printk(XENLOG_INFO "%s: %s\n", info, caps[i].desc); in update_cpu_capabilities()
38 cpus_set_cap(caps[i].capability); in update_cpu_capabilities()
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| /xen-4.10.0-shim-comet/xen/arch/x86/mm/hap/ |
| A D | nested_ept.c | 114 uint64_t caps = 0; in nept_get_ept_vpid_cap() local
117 caps |= NEPT_CAP_BITS; in nept_get_ept_vpid_cap()
119 caps &= ~VMX_EPT_EXEC_ONLY_SUPPORTED; in nept_get_ept_vpid_cap()
121 caps |= NVPID_CAP_BITS; in nept_get_ept_vpid_cap()
123 return caps; in nept_get_ept_vpid_cap()
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| /xen-4.10.0-shim-comet/tools/libxc/ |
| A D | xc_resume.c | 30 xen_capabilities_info_t caps; in modify_returncode() local
59 if ( xc_version(xch, XENVER_capabilities, &caps) != 0 ) in modify_returncode()
64 dinfo->guest_width = strstr(caps, "x86_64") ? 8 : 4; in modify_returncode()
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| A D | xc_cpuid_x86.c | 45 int xc_get_cpu_levelling_caps(xc_interface *xch, uint32_t *caps) in xc_get_cpu_levelling_caps() argument
54 *caps = sysctl.u.cpu_levelling_caps.caps; in xc_get_cpu_levelling_caps()
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| /xen-4.10.0-shim-comet/xen/arch/x86/cpu/ |
| A D | intel.c | 25 static uint64_t __init _probe_mask_msr(unsigned int *msr, uint64_t caps) in _probe_mask_msr() argument
29 expected_levelling_cap |= caps; in _probe_mask_msr()
34 levelling_caps |= caps; in _probe_mask_msr()
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| A D | amd.c | 139 static uint64_t __init _probe_mask_msr(unsigned int msr, uint64_t caps) in _probe_mask_msr() argument
143 expected_levelling_cap |= caps; in _probe_mask_msr()
147 levelling_caps |= caps; in _probe_mask_msr()
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| A D | vpmu_intel.c | 925 u64 caps; in core2_vpmu_init() local
957 rdmsrl(MSR_IA32_PERF_CAPABILITIES, caps); in core2_vpmu_init()
958 full_width_write = (caps >> 13) & 1; in core2_vpmu_init()
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| /xen-4.10.0-shim-comet/xen/arch/x86/cpu/mcheck/ |
| A D | vmce.c | 82 if ( ctxt->caps & ~guest_mcg_cap & ~MCG_CAP_COUNT & ~MCG_CTL_P ) in vmce_restore_vcpu()
86 is_hvm_vcpu(v) ? "HVM" : "PV", ctxt->caps, in vmce_restore_vcpu()
91 v->arch.vmce.mcg_cap = ctxt->caps; in vmce_restore_vcpu()
360 .caps = v->arch.vmce.mcg_cap, in vmce_save_vcpu_ctxt()
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| /xen-4.10.0-shim-comet/xen/common/efi/ |
| A D | runtime.c | 358 EFI_TIME_CAPABILITIES caps; in efi_runtime_call() local
367 status = efi_rs->GetTime(cast_time(&op->u.get_time.time), &caps); in efi_runtime_call()
373 op->u.get_time.resolution = caps.Resolution; in efi_runtime_call()
374 op->u.get_time.accuracy = caps.Accuracy; in efi_runtime_call()
375 if ( caps.SetsToZero ) in efi_runtime_call()
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| /xen-4.10.0-shim-comet/xen/arch/x86/ |
| A D | sysctl.c | 224 sysctl->u.cpu_levelling_caps.caps = levelling_caps; in arch_do_sysctl()
225 if ( __copy_field_to_guest(u_sysctl, sysctl, u.cpu_levelling_caps.caps) ) in arch_do_sysctl()
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| A D | setup.c | 780 u16 caps = bootsym(boot_edid_caps); in __start_xen() local
782 (caps & 1) ? " V1" : "", in __start_xen()
783 (caps & 2) ? " V2" : "", in __start_xen()
784 !(caps & 3) ? " none" : ""); in __start_xen()
785 printk("EDID transfer time: %d seconds\n", caps >> 8); in __start_xen()
789 if ( !(caps & 3) ) in __start_xen()
791 else if ( (caps >> 8) > 5 ) in __start_xen()
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| A D | domctl.c | 319 VMCE_SIZE(caps), in vcpu_set_vmce()
329 offsetof(typeof(*evc), vmce.caps)); in vcpu_set_vmce()
330 BUILD_BUG_ON(sizeof(evc->mcg_cap) != sizeof(evc->vmce.caps)); in vcpu_set_vmce()
910 evc->vmce.caps = v->arch.vmce.mcg_cap; in arch_do_domctl()
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| /xen-4.10.0-shim-comet/xen/include/asm-arm/ |
| A D | cpufeature.h | 85 void update_cpu_capabilities(const struct arm_cpu_capabilities *caps,
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| /xen-4.10.0-shim-comet/docs/features/ |
| A D | sched_credit2.pandoc | 82 * vCPUs' reservations (similar to caps, but providing a vCPU with guarantees
108 2017-11-6 2 Xen 4.10 Soft-affinity and caps implemented
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| A D | sched_credit.pandoc | 54 complex (due to, e.g., the introduction of boosting, caps and vCPU
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| A D | feature-levelling.pandoc | 147 `XEN_SYSCTL_get_cpu_featureset`, and query for the levelling caps via
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| /xen-4.10.0-shim-comet/xen/include/public/arch-x86/hvm/ |
| A D | save.h | 610 uint64_t caps; member
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| /xen-4.10.0-shim-comet/tools/libxl/ |
| A D | libxl_dom.c | 308 unsigned long caps = info->u.hvm.mca_caps; in hvm_set_mca_capabilities() local
310 if (!caps) in hvm_set_mca_capabilities()
313 return xc_hvm_param_set(CTX->xch, domid, HVM_PARAM_MCA_CAP, caps); in hvm_set_mca_capabilities()
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| /xen-4.10.0-shim-comet/tools/pygrub/src/ |
| A D | pygrub | 671 caps = xc.xeninfo()['xen_caps'].split(" ")
672 for cap in caps:
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| /xen-4.10.0-shim-comet/tools/misc/ |
| A D | xen-hvmctx.c | 391 printf(" VMCE_VCPU: caps %" PRIx64 "\n", p.caps); in dump_vmce_vcpu()
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| /xen-4.10.0-shim-comet/xen/include/public/ |
| A D | sysctl.h | 834 uint32_t caps; member
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| /xen-4.10.0-shim-comet/xen/arch/x86/hvm/vmx/ |
| A D | vmx.c | 2834 uint64_t caps; in lbr_tsx_fixup_check() local
2844 rdmsrl(MSR_IA32_PERF_CAPABILITIES, caps); in lbr_tsx_fixup_check()
2845 lbr_format = caps & MSR_IA32_PERF_CAP_LBR_FORMAT; in lbr_tsx_fixup_check()
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| /xen-4.10.0-shim-comet/tools/libxc/include/ |
| A D | xenctrl.h | 2523 int xc_get_cpu_levelling_caps(xc_interface *xch, uint32_t *caps);
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| /xen-4.10.0-shim-comet/tools/firmware/vgabios/ |
| A D | clext.c | 825 xor ax, ax ;; caps
|