1 /**************************************************************************//**
2  * @file     ARMCM0.h
3  * @brief    CMSIS Core Peripheral Access Layer Header File for
4  *           ARMCM0 Device
5  * @version  V5.3.1
6  * @date     09. July 2018
7  ******************************************************************************/
8 /*
9  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
10  *
11  * SPDX-License-Identifier: Apache-2.0
12  *
13  * Licensed under the Apache License, Version 2.0 (the License); you may
14  * not use this file except in compliance with the License.
15  * You may obtain a copy of the License at
16  *
17  * www.apache.org/licenses/LICENSE-2.0
18  *
19  * Unless required by applicable law or agreed to in writing, software
20  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
21  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22  * See the License for the specific language governing permissions and
23  * limitations under the License.
24  */
25 
26 #ifndef ARMCM0_H
27 #define ARMCM0_H
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
33 
34 /* -------------------------  Interrupt Number Definition  ------------------------ */
35 
36 typedef enum IRQn
37 {
38 /* -------------------  Processor Exceptions Numbers  ----------------------------- */
39   NonMaskableInt_IRQn           = -14,     /*  2 Non Maskable Interrupt */
40   HardFault_IRQn                = -13,     /*  3 HardFault Interrupt */
41 
42 
43 
44   SVCall_IRQn                   =  -5,     /* 11 SV Call Interrupt */
45 
46   PendSV_IRQn                   =  -2,     /* 14 Pend SV Interrupt */
47   SysTick_IRQn                  =  -1,     /* 15 System Tick Interrupt */
48 
49 /* -------------------  Processor Interrupt Numbers  ------------------------------ */
50   Interrupt0_IRQn               =   0,
51   Interrupt1_IRQn               =   1,
52   Interrupt2_IRQn               =   2,
53   Interrupt3_IRQn               =   3,
54   Interrupt4_IRQn               =   4,
55   Interrupt5_IRQn               =   5,
56   Interrupt6_IRQn               =   6,
57   Interrupt7_IRQn               =   7,
58   Interrupt8_IRQn               =   8,
59   Interrupt9_IRQn               =   9
60   /* Interrupts 10 .. 31 are left out */
61 } IRQn_Type;
62 
63 
64 /* ================================================================================ */
65 /* ================      Processor and Core Peripheral Section     ================ */
66 /* ================================================================================ */
67 
68 /* -------  Start of section using anonymous unions and disabling warnings  ------- */
69 #if   defined (__CC_ARM)
70   #pragma push
71   #pragma anon_unions
72 #elif defined (__ICCARM__)
73   #pragma language=extended
74 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
75   #pragma clang diagnostic push
76   #pragma clang diagnostic ignored "-Wc11-extensions"
77   #pragma clang diagnostic ignored "-Wreserved-id-macro"
78 #elif defined (__GNUC__)
79   /* anonymous unions are enabled by default */
80 #elif defined (__TMS470__)
81   /* anonymous unions are enabled by default */
82 #elif defined (__TASKING__)
83   #pragma warning 586
84 #elif defined (__CSMC__)
85   /* anonymous unions are enabled by default */
86 #else
87   #warning Not supported compiler type
88 #endif
89 
90 
91 /* --------  Configuration of Core Peripherals  ----------------------------------- */
92 #define __CM0_REV                 0x0000U   /* Core revision r0p0 */
93 #define __MPU_PRESENT             0U        /* no MPU present */
94 #define __VTOR_PRESENT            0U        /* no VTOR present */
95 #define __NVIC_PRIO_BITS          2U        /* Number of Bits used for Priority Levels */
96 #define __Vendor_SysTickConfig    0U        /* Set to 1 if different SysTick Config is used */
97 
98 #include "core_cm0.h"                       /* Processor and core peripherals */
99 #include "system_ARMCM0.h"                  /* System Header */
100 
101 
102 /* --------  End of section using anonymous unions and disabling warnings  -------- */
103 #if   defined (__CC_ARM)
104   #pragma pop
105 #elif defined (__ICCARM__)
106   /* leave anonymous unions enabled */
107 #elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
108   #pragma clang diagnostic pop
109 #elif defined (__GNUC__)
110   /* anonymous unions are enabled by default */
111 #elif defined (__TMS470__)
112   /* anonymous unions are enabled by default */
113 #elif defined (__TASKING__)
114   #pragma warning restore
115 #elif defined (__CSMC__)
116   /* anonymous unions are enabled by default */
117 #else
118   #warning Not supported compiler type
119 #endif
120 
121 
122 #ifdef __cplusplus
123 }
124 #endif
125 
126 #endif  /* ARMCM0_H */
127