1 /* 2 * Copyright (C) 2017-2020 Alibaba Group Holding Limited 3 */ 4 5 /****************************************************************************** 6 * @file drv/porting.h 7 * @brief Header File for SOC Porting 8 * @version V1.0 9 * @date 8. Apr 2020 10 * @model porting 11 ******************************************************************************/ 12 13 #ifndef _DRV_PORTING_H_ 14 #define _DRV_PORTING_H_ 15 16 #include <stdint.h> 17 #include <stdbool.h> 18 #include <drv/common.h> 19 20 /** 21 \brief Soc get device frequence. 22 \param[in] idx Device index 23 \return frequence 24 */ 25 uint32_t soc_get_apb_freq(uint32_t idx); 26 uint32_t soc_get_ahb_freq(uint32_t idx); 27 uint32_t soc_get_cpu_freq(uint32_t idx); 28 uint32_t soc_get_uart_freq(uint32_t idx); 29 uint32_t soc_get_spi_freq(uint32_t idx); 30 uint32_t soc_get_iic_freq(uint32_t idx); 31 uint32_t soc_get_i2s_freq(uint32_t idx); 32 uint32_t soc_get_pwm_freq(uint32_t idx); 33 uint32_t soc_get_adc_freq(uint32_t idx); 34 uint32_t soc_get_qspi_freq(uint32_t idx); 35 uint32_t soc_get_usi_freq(uint32_t idx); 36 uint32_t soc_get_timer_freq(uint32_t idx); 37 uint32_t soc_get_rtc_freq(uint32_t idx); 38 uint32_t soc_get_wdt_freq(uint32_t idx); 39 uint32_t soc_get_sdio_freq(uint32_t idx); 40 uint32_t soc_get_coretim_freq(void); 41 uint32_t soc_get_cur_cpu_freq(void); 42 43 /** 44 \brief Soc get device frequence. 45 \param[in] freq CPU frequence 46 \return none 47 */ 48 void soc_set_sys_freq(uint32_t freq); 49 50 /* 51 \brief Soc enable device clock 52 \param[in] module Clock module, defined in sys_clk.h, \ref clk_module_t 53 \return none 54 */ 55 void soc_clk_enable(int32_t module); 56 57 /* 58 \brief Soc disable device clock 59 \param[in] module Clock module, defined in sys_clk.h, \ref clk_module_t 60 \return none 61 */ 62 void soc_clk_disable(int32_t module); 63 64 /* 65 \brief Get CPU ID 66 \return CPU ID, the val is 0, 1, 2... 67 */ 68 uint32_t soc_get_cpu_id(void); 69 70 /** 71 \brief SOC Dcache clean & invalid by range. 72 \return None 73 */ 74 void soc_dcache_clean_invalid_range(unsigned long addr, uint32_t size); 75 76 /** 77 \brief SOC Dcache clean & invalid all. 78 \return None 79 */ 80 void soc_dcache_clean_invalid_all(void); 81 82 /** 83 \brief SOC Dcache invalid by range. 84 \return None 85 */ 86 void soc_dcache_invalid_range(unsigned long addr, uint32_t size); 87 88 /** 89 \brief SOC Dcache clean all. 90 \return None 91 */ 92 void soc_dcache_clean(void); 93 94 /** 95 \brief SOC Icache invalid all. 96 \return None 97 */ 98 void soc_icache_invalid(void); 99 100 /** 101 \brief SOC dma address remap. 102 \return Remaped address 103 */ 104 extern unsigned long soc_dma_address_remap(unsigned long addr); 105 106 107 #ifdef CONFIG_PM 108 /** 109 \brief SoC enter low-power mode, each chip's implementation is different 110 called by csi_pm_enter_sleep 111 \param[in] mode low-power mode 112 \return Error code 113 */ 114 csi_error_t soc_pm_enter_sleep(csi_pm_mode_t mode); 115 116 /** 117 \brief SoC the wakeup source. 118 \param[in] wakeup_num Wakeup source num 119 \param[in] enable Flag control the wakeup source is enable or not 120 \return Error code 121 */ 122 csi_error_t soc_pm_config_wakeup_source(uint32_t wakeup_num, bool enable); 123 #endif 124 125 #endif /* _DRV_PORTING_H_ */ 126