1 /*
2 * This file is part of the MicroPython project, http://micropython.org/
3 *
4 * The MIT License (MIT)
5 *
6 * Copyright (c) 2017-2018 Damien P. George
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 */
26 #ifndef MICROPY_INCLUDED_DRIVERS_BUS_QSPI_H
27 #define MICROPY_INCLUDED_DRIVERS_BUS_QSPI_H
28
29 #include "py/mphal.h"
30
31 #define MP_SPI_ADDR_IS_32B(addr) (addr & 0xff000000)
32
33 enum {
34 MP_QSPI_IOCTL_INIT,
35 MP_QSPI_IOCTL_DEINIT,
36 MP_QSPI_IOCTL_BUS_ACQUIRE,
37 MP_QSPI_IOCTL_BUS_RELEASE,
38 };
39
40 typedef struct _mp_qspi_proto_t {
41 int (*ioctl)(void *self, uint32_t cmd);
42 void (*write_cmd_data)(void *self, uint8_t cmd, size_t len, uint32_t data);
43 void (*write_cmd_addr_data)(void *self, uint8_t cmd, uint32_t addr, size_t len, const uint8_t *src);
44 uint32_t (*read_cmd)(void *self, uint8_t cmd, size_t len);
45 void (*read_cmd_qaddr_qdata)(void *self, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest);
46 } mp_qspi_proto_t;
47
48 typedef struct _mp_soft_qspi_obj_t {
49 mp_hal_pin_obj_t cs;
50 mp_hal_pin_obj_t clk;
51 mp_hal_pin_obj_t io0;
52 mp_hal_pin_obj_t io1;
53 mp_hal_pin_obj_t io2;
54 mp_hal_pin_obj_t io3;
55 } mp_soft_qspi_obj_t;
56
57 extern const mp_qspi_proto_t mp_soft_qspi_proto;
58
mp_spi_set_addr_buff(uint8_t * buf,uint32_t addr)59 static inline uint8_t mp_spi_set_addr_buff(uint8_t *buf, uint32_t addr) {
60 if (MP_SPI_ADDR_IS_32B(addr)) {
61 buf[0] = addr >> 24;
62 buf[1] = addr >> 16;
63 buf[2] = addr >> 8;
64 buf[3] = addr;
65 return 4;
66 } else {
67 buf[0] = addr >> 16;
68 buf[1] = addr >> 8;
69 buf[2] = addr;
70 return 3;
71 }
72 }
73
74 #endif // MICROPY_INCLUDED_DRIVERS_BUS_QSPI_H
75