1#include "k_config.h"
2
3;******************************************************************************
4;                                 EQUATES
5;******************************************************************************
6CONTEXT_REGION  EQU  88   ;bigger than sizeof(PANIC_CONTEXT)
7
8;******************************************************************************
9;                        CODE GENERATION DIRECTIVES
10;******************************************************************************
11    AREA |.text|, CODE, READONLY, ALIGN=2
12    THUMB
13    REQUIRE8
14    PRESERVE8
15
16#if AOS_COMP_DEBUG
17
18;******************************************************************************
19;                            EXTERN PARAMETERS
20;******************************************************************************
21    EXTERN panicHandler
22    EXTERN g_crash_steps
23    EXTERN _first_task_restore
24    EXTERN panicRestoreCheck
25
26;******************************************************************************
27;                            EXPORT FUNCTIONS
28;******************************************************************************
29    EXPORT HardFault_Handler
30    EXPORT MemManage_Handler
31    EXPORT BusFault_Handler
32    EXPORT UsageFault_Handler
33
34;******************************************************************************
35;                             FAULT FUNCTIONS
36;******************************************************************************
37HardFault_Handler
38MemManage_Handler
39BusFault_Handler
40UsageFault_Handler
41    PUSH    {R1, LR}
42    BL      panicRestoreCheck
43    POP     {R1, LR}
44    CBZ     R0, unrecoverable_crash
45    BL     _first_task_restore
46
47unrecoverable_crash
48    ;check double crash
49    LDR     R1, =g_crash_steps
50    LDR     R2, [R1]
51    ADD     R3, R2, #1
52    STR     R3, [R1]
53    CBZ     R2, first_panic
54    ;return from exc to handle panic
55    MRS     R1, PSP
56    AND     R2, LR, #4          ;EXC_RETURN:bit2, 0 MSP, 1 PSP
57    CBNZ    R2, double_panic
58    MRS     R1, MSP
59double_panic
60    LDR     R0, =double_panic_entry
61    STR     R0, [R1, #24]
62    LDR     R0, [R1, #28]
63    ORR     R0, R0, #0x1000000
64    STR     R0, [R1, #28]       ;set thumb mode
65    BX      LR
66
67double_panic_entry
68    MOV     R0, #0              ;double crash, do not save context
69    BL      panicHandler
70    B       .
71
72first_panic
73    ;R0 as PANIC_CONTEXT
74    SUB     R0, SP, #CONTEXT_REGION
75
76    ;R1 as CONTEXT saved by hardware
77    MRS     R1, PSP
78    AND     R2, LR, #4          ;EXC_RETURN:bit2, 0 MSP, 1 PSP
79    CBNZ    R2, context_save
80    MRS     R1, MSP
81context_save
82
83    ADD     R2, R0, #16
84    STM     R2!,{R4-R11}        ;ctx save, R4~R11
85
86    LDM     R1, {R4-R11}
87    STM     R0, {R4-R7}         ;ctx save, R0~R3
88
89    STM     R2!,{R8-R11}        ;ctx save, R12 LR PC xPSR
90
91    ;xPSR[9] and EXC_RETURN[4] to determine whether
92    ;the previous top-of-stack was at offset 0x20, 0x24, 0x68, or0x6C
93    ADD     R4, R1, #0x20
94  IF {FPU} != "SoftVFP"
95    AND     R3, LR, #0x10       ;EXC_RETURN:bit4, 0 floating, 1 non-floating
96    CBNZ    R3, check_aligner
97    ADD     R4, R4, #0x48
98check_aligner
99  ENDIF
100    LDR     R3, [R1, #28]
101    AND     R3, R3, #0x200      ;xPSR:bit9, 0 no-aligner, 1 aligner
102    CBZ     R3, sp_save
103    ADD     R4, R4, #0x4
104sp_save
105    STM     R2!,{R4}            ;ctx save, SP
106
107    MOV     R4, LR
108    STM     R2!,{R4}            ;ctx save, EXC_RETURN
109
110    MRS     R4, IPSR
111    STM     R2!,{R4}            ;ctx save, EXC_NUMBER
112
113    MRS     R4, PRIMASK
114    STM     R2!,{R4}            ;ctx save, PRIMASK
115
116    MRS     R4, FAULTMASK
117    STM     R2!,{R4}            ;ctx save, FAULTMASK
118
119    MRS     R4, BASEPRI
120    STM     R2!,{R4}            ;ctx save, BASEPRI
121
122    ;return from exc to handle panic
123    STR     R0, [R1, #0]
124    LDR     R0, =panic_entry
125    STR     R0, [R1, #24]
126    LDR     R0, [R1, #28]
127    ORR     R0, R0, #0x1000000
128    STR     R0, [R1, #28]       ;set thumb mode
129    CPSID   I
130    BX      LR
131
132panic_entry
133#if DEBUG_PANIC_PRT_INT
134    MRS     R1, CONTROL
135    MOVS    R2, #2
136    BICS    R1, R2
137    MSR     CONTROL, R1
138    ISB
139    ;printf use interrupt, so here enable it
140    CPSIE   I
141#endif
142
143    MOV     SP, R0
144    BL      panicHandler
145    B       .
146
147    ALIGN
148
149#endif
150
151    END
152