1 /*
2  * Copyright (C) 2015-2020 Alibaba Group Holding Limited
3  */
4 
5 #include <drv/pwm.h>
6 #include <aos/pwm_csi.h>
7 #include "hal_pwm.h"
8 #include "hal_gpio.h"
9 #include "hal_trace.h"
10 #include "hal_iomux.h"
11 #include "hal_cmu.h"
12 #include "pmu.h"
13 
14 
15 #define _HAL_PWM_MAX_NUM 4
16 static struct HAL_IOMUX_PIN_FUNCTION_MAP pinmux_pwm[_HAL_PWM_MAX_NUM] = {
17         {HAL_IOMUX_PIN_P2_6, HAL_IOMUX_FUNC_PWM0, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENALBE},
18         {HAL_IOMUX_PIN_P2_7, HAL_IOMUX_FUNC_PWM1, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENALBE},
19         {HAL_IOMUX_PIN_P2_4, HAL_IOMUX_FUNC_PWM2, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENALBE},
20         {HAL_IOMUX_PIN_P2_5, HAL_IOMUX_FUNC_PWM3, HAL_IOMUX_PIN_VOLTAGE_VIO, HAL_IOMUX_PIN_PULLUP_ENALBE},
21 };
22 
csi_pwm_init(csi_pwm_t * pwm,uint32_t idx)23 csi_error_t csi_pwm_init(csi_pwm_t *pwm, uint32_t idx)
24 {
25     return CSI_OK;
26 }
27 
csi_pwm_uninit(csi_pwm_t * pwm)28 void csi_pwm_uninit(csi_pwm_t *pwm)
29 {
30     return;
31 }
32 
csi_pwm_out_config(csi_pwm_t * pwm,uint32_t channel,uint32_t period_us,uint32_t pulse_width_us,csi_pwm_polarity_t polarity)33 csi_error_t csi_pwm_out_config(csi_pwm_t *pwm, uint32_t channel, uint32_t period_us,
34                                 uint32_t pulse_width_us, csi_pwm_polarity_t polarity)
35 {
36     struct HAL_PWM_CFG_T cfg;
37     hal_iomux_init(&pinmux_pwm[channel], 1);
38     hal_gpio_pin_set_dir(pinmux_pwm[channel].pin, HAL_GPIO_DIR_OUT, 1);
39     if (period_us == 0) {
40         hal_pwm_disable(channel);
41     } else {
42         cfg.freq = 1000000UL / period_us;
43         cfg.ratio = (((uint64_t)pulse_width_us) * 100 / period_us);
44         cfg.inv = polarity;
45         cfg.sleep_on = false;
46         hal_pwm_enable(channel, &cfg);
47     }
48     return 0;
49 }
50 
csi_pwm_out_start(csi_pwm_t * pwm,uint32_t channel)51 csi_error_t csi_pwm_out_start(csi_pwm_t *pwm, uint32_t channel)
52 {
53     uint32_t pwm_chan = channel;
54     return CSI_OK;
55 }
56 
csi_pwm_out_stop(csi_pwm_t * pwm,uint32_t channel)57 void csi_pwm_out_stop(csi_pwm_t *pwm, uint32_t channel)
58 {
59     uint32_t pwm_chan = channel;
60     hal_pwm_disable(pwm_chan);
61 }
pwm_csi_init(void)62 static int pwm_csi_init(void)
63 {
64     csi_error_t ret;
65     static aos_pwm_csi_t pwm_csi_dev[CONFIG_PWM_NUM];
66     int i;
67     for (i = 0; i < CONFIG_PWM_NUM; i++) {
68         pwm_csi_dev[i].csi_pwm.dev.idx |= (i);
69         if (ret != CSI_OK) {
70             return ret;
71         }
72         pwm_csi_dev[i].aos_pwm.dev.id = i;
73         ret =  aos_pwm_csi_register(&(pwm_csi_dev[i]));
74         if  (ret != CSI_OK) {
75             return ret;
76         }
77     }
78     return 0;
79 }
80 
81 LEVEL1_DRIVER_ENTRY(pwm_csi_init)
82