1 /* mbed Microcontroller Library
2  * CMSIS-style functionality to support dynamic vectors
3  *******************************************************************************
4  * Copyright (c) 2011 ARM Limited. All rights reserved.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions are met:
9  *
10  * 1. Redistributions of source code must retain the above copyright notice,
11  *    this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright notice,
13  *    this list of conditions and the following disclaimer in the documentation
14  *    and/or other materials provided with the distribution.
15  * 3. Neither the name of ARM Limited nor the names of its contributors
16  *    may be used to endorse or promote products derived from this software
17  *    without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
26  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29  *******************************************************************************
30  */
31 
32 #ifndef MBED_CMSIS_NVIC_H
33 #define MBED_CMSIS_NVIC_H
34 
35 #include "cmsis.h"
36 
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40 
41 typedef void (*NVIC_DEFAULT_FAULT_HANDLER_T)(void);
42 
43 void NVIC_DisableAllIRQs(void);
44 
45 void NVIC_InitVectors(void);
46 
47 void NVIC_SetDefaultFaultHandler(NVIC_DEFAULT_FAULT_HANDLER_T handler);
48 
49 void NVIC_SetDefaultFaultHandler_cp(NVIC_DEFAULT_FAULT_HANDLER_T handler);
50 
51 IRQn_Type NVIC_GetCurrentActiveIRQ(void);
52 
53 void NVIC_PowerDownSleep(uint32_t *buf, uint32_t cnt);
54 
55 void NVIC_PowerDownWakeup(uint32_t *buf, uint32_t cnt);
56 
57 #ifdef __ARM_ARCH_ISA_ARM
58 enum EXCEPTION_ID_T {
59     EXCEPTION_NONE = -1,
60     EXCEPTION_UNDEF = -2,
61     EXCEPTION_SVC = -3,
62     EXCEPTION_PABT = -4,
63     EXCEPTION_DABT = -5,
64     EXCEPTION_HYP = -6,
65     EXCEPTION_IRQ = -7,
66     EXCEPTION_FIQ = -8,
67 };
68 
69 struct FAULT_REGS_T {
70     uint32_t r[16];
71     uint32_t spsr;
72 };
73 
74 struct UNDEF_FAULT_INFO_T {
75     enum EXCEPTION_ID_T id;
76     uint32_t opcode;
77     uint32_t state;
78 };
79 
80 struct SVC_FAULT_INFO_T {
81     enum EXCEPTION_ID_T id;
82     uint32_t svc_num;
83 };
84 
85 struct PABT_FAULT_INFO_T {
86     enum EXCEPTION_ID_T id;
87     uint32_t IFSR;
88     uint32_t IFAR;
89 };
90 
91 struct DABT_FAULT_INFO_T {
92     enum EXCEPTION_ID_T id;
93     uint32_t DFSR;
94     uint32_t DFAR;
95 };
96 
97 typedef void (*GIC_FAULT_DUMP_HANDLER_T)(const uint32_t *regs, const uint32_t *extra, uint32_t extra_len);
98 
99 void GIC_DisableAllIRQs(void);
100 
101 void GIC_InitVectors(void);
102 
103 void GIC_SetFaultDumpHandler(GIC_FAULT_DUMP_HANDLER_T handler);
104 
105 IRQn_Type IRQ_GetCurrentActiveIRQ(void);
106 #endif
107 
108 #ifdef __cplusplus
109 }
110 #endif
111 
112 #endif
113