1 /* 2 * Copyright (C) 2015-2020 Alibaba Group Holding Limited 3 */ 4 5 #ifndef __2NDBOOT_FLASH_H__ 6 #define __2NDBOOT_FLASH_H__ 7 8 #define REG_READ(addr) *((volatile UINT32 *)(addr)) 9 #define REG_WRITE(addr, _data) (*((volatile UINT32 *)(addr)) = (_data)) 10 11 #define MODE_STD 0 12 #define MODE_DUAL 1 13 #define MODE_QUAD 2 14 15 #define FLASH_WRITE_UNIT 32 16 17 #define FLASH_BASE (0x00803000) 18 19 #define REG_FLASH_OPERATE_SW (FLASH_BASE + 0 * 4) 20 #define ADDR_SW_REG_POSI (0) 21 #define ADDR_SW_REG_MASK (0xFFFFFF) 22 #define OP_TYPE_SW_POSI (24) 23 #define OP_TYPE_SW_MASK (0x1F) 24 #define OP_SW (0x01UL << 29) 25 #define WP_VALUE (0x01UL << 30) 26 #define BUSY_SW (0x01UL << 31) 27 28 #define REG_FLASH_DATA_SW_FLASH (FLASH_BASE + 1 * 4) 29 30 #define REG_FLASH_DATA_FLASH_SW (FLASH_BASE + 2 * 4) 31 32 #define REG_FLASH_RDID_DATA_FLASH (FLASH_BASE + 4 * 4) 33 34 #define REG_FLASH_SR_DATA_CRC_CNT (FLASH_BASE + 5 * 4) 35 #define SR_DATA_FLASH_POSI (0) 36 #define SR_DATA_FLASH_MASK (0xFF) 37 #define CRC_ERROR_COUNT_POSI (8) 38 #define CRC_ERROR_COUNT_MASK (0xFF) 39 #define DATA_FLASH_SW_SEL_POSI (16) 40 #define DATA_FLASH_SW_SEL_MASK (0x07) 41 #define DATA_SW_FLASH_SEL_POSI (19) 42 #define DATA_SW_FLASH_SEL_MASK (0x07) 43 44 #define REG_FLASH_CONF (FLASH_BASE + 7 * 4) 45 #define FLASH_CLK_CONF_POSI (0) 46 #define FLASH_CLK_CONF_MASK (0x0F) 47 #define MODEL_SEL_POSI (4) 48 #define MODEL_SEL_MASK (0x1F) 49 #define FWREN_FLASH_CPU (0x01UL << 9) 50 #define WRSR_DATA_POSI (10) 51 #define WRSR_DATA_MASK (0xFFFF) 52 #define CRC_EN (0x01UL << 26) 53 54 typedef enum 55 { 56 FLASH_OPCODE_WREN = 1, 57 FLASH_OPCODE_WRDI = 2, 58 FLASH_OPCODE_RDSR = 3, 59 FLASH_OPCODE_WRSR = 4, 60 FLASH_OPCODE_READ = 5, 61 FLASH_OPCODE_RDSR2 = 6, 62 FLASH_OPCODE_WRSR2 = 7, 63 FLASH_OPCODE_PP = 12, 64 FLASH_OPCODE_SE = 13, 65 FLASH_OPCODE_BE1 = 14, 66 FLASH_OPCODE_BE2 = 15, 67 FLASH_OPCODE_CE = 16, 68 FLASH_OPCODE_DP = 17, 69 FLASH_OPCODE_RFDP = 18, 70 FLASH_OPCODE_RDID = 20, 71 FLASH_OPCODE_HPM = 21, 72 FLASH_OPCODE_CRMR = 22, 73 FLASH_OPCODE_CRMR2 = 23, 74 } FLASH_OPCODE; 75 #endif // __2NDBOOT_FLASH_H__