1 /*
2 * Copyright (C) 2015-2017 Alibaba Group Holding Limited
3 */
4
5 #include <k_api.h>
6 #include <assert.h>
7 #include <stdio.h>
8 #include <sys/time.h>
9 #include "diag.h"
10
11 #include "ameba_soc.h"
12 #include "build_info.h"
13 //#include "strproc.h"
14 #include "rtl8721d_system.h"
15
16 #if AOS_COMP_CLI
17 #include "aos/cli.h"
18 #endif
19
soc_hr_hw_freq_mhz(void)20 float soc_hr_hw_freq_mhz(void)
21 {
22 return (SystemGetCpuClk()/1000000);
23 }
24
hal_sys_timer_calc_cpu_freq(uint32_t interval_ms,int high_res)25 uint32_t hal_sys_timer_calc_cpu_freq(uint32_t interval_ms, int high_res)
26 {
27 (void)interval_ms;
28 (void)high_res;
29 return SystemGetCpuClk();
30 }
31
32 #if (RHINO_CONFIG_HW_COUNT > 0)
soc_hw_timer_init(void)33 void soc_hw_timer_init(void)
34 {
35 uint32_t temp = (uint32_t)(0xFFFFFFFF / 1000000 * 32768);
36
37 RTIM_ChangePeriodImmediate(TIMx[0], temp);
38 RTIM_INTConfig(TIMx[0], TIM_IT_Update, ENABLE);
39 RTIM_Cmd(TIMx[0], ENABLE);
40 }
41
soc_hr_hw_cnt_get(void)42 hr_timer_t soc_hr_hw_cnt_get(void)
43 {
44 uint32_t tick;
45
46 RTIM_TypeDef *TIM = TIMx[0];
47 tick = RTIM_GetCount(TIM);
48
49 return tick;
50 }
51
soc_lr_hw_cnt_get(void)52 lr_timer_t soc_lr_hw_cnt_get(void)
53 {
54 uint32_t tick;
55
56 RTIM_TypeDef *TIM = TIMx[0];
57 tick = RTIM_GetCount(TIM);
58
59 return tick;
60 }
61
62 #endif /* RHINO_CONFIG_HW_COUNT */
63
64 #if (RHINO_CONFIG_INTRPT_STACK_OVF_CHECK > 0)
soc_intrpt_stack_ovf_check(void)65 void soc_intrpt_stack_ovf_check(void)
66 {
67 }
68 #endif
69
70 #if (RHINO_CONFIG_MM_TLF > 0)
71 #if !defined (__CC_ARM) /* Keil / armcc */
72 extern void *heap_start;
73 extern void *heap_end;
74 extern void *heap_len;
75
76 //extern void *heap2_start;
77 //extern void *heap2_len;
78 #endif
79
80 //#include "section_config.h"
81 //SRAM_BF_DATA_SECTION
82 //#endif
83 //static unsigned char ucHeap[ configTOTAL_HEAP_SIZE ];
84
85
86 #if defined (__CC_ARM) /* Keil / armcc */
87 #define HEAP_BUFFER_SIZE 1024*60
88 uint8_t g_heap_buf[HEAP_BUFFER_SIZE];
89 k_mm_region_t g_mm_region[] = {{g_heap_buf, HEAP_BUFFER_SIZE}, {(uint8_t *)0x10000000, 0x8000}};
90 #else
91 #define configTOTAL_PSRAM_HEAP_SIZE (0x400000 - 0x20000)
92 PSRAM_HEAP_SECTION static unsigned char psRAMHeap[configTOTAL_PSRAM_HEAP_SIZE];
93
94 k_mm_region_t g_mm_region[2] = {{(uint8_t*)&heap_start,(size_t)&heap_len},
95 {(uint8_t*)psRAMHeap,(size_t)configTOTAL_PSRAM_HEAP_SIZE},
96 }; //,
97 // {(uint8_t*)MM_ALIGN_UP(0x100014f9), MM_ALIGN_DOWN(0xb07)},
98 // {(uint8_t*)MM_ALIGN_UP(0x10002475), MM_ALIGN_DOWN(0x2b8b)}};
99
100 #endif
101 int g_region_num = sizeof(g_mm_region)/sizeof(k_mm_region_t);
102
103 #endif
104
105 extern void hal_reboot(void);
soc_err_proc(kstat_t err)106 void soc_err_proc(kstat_t err)
107 {
108 DBG_8195A("soc_err_proc : %d\n\r", err);
109 if ( RHINO_NO_MEM == err )
110 {
111 /* while mem not enought, reboot */
112 hal_reboot();
113 }
114 }
115
116 krhino_err_proc_t g_err_proc = soc_err_proc;
117
118 /* use for printk */
alios_debug_print(const char * buf,int size)119 int alios_debug_print(const char *buf, int size)
120 {
121 int i;
122
123 for (i = 0; i < size; i++) {
124 DiagPutChar(*buf++);
125 }
126
127 return 0;
128 }
129
uart_input_read(void)130 char uart_input_read(void)
131 {
132 return DiagGetChar(1);
133 }
134
135 /* check pc available 0:available other:not available */
136 extern uint8_t __flash_text_start__[];
137 extern uint8_t __flash_text_end__[];
138 extern uint8_t __ram_image2_text_start__[];
139 extern uint8_t __ram_image2_text_end__[];
140
alios_debug_pc_check(char * pc)141 int alios_debug_pc_check(char *pc)
142 {
143 if ((((uint32_t)pc > (uint32_t)__flash_text_start__) &&
144 ((uint32_t)pc < (uint32_t)__flash_text_end__)) ||
145 (((uint32_t)pc > (uint32_t)__ram_image2_text_start__) &&
146 ((uint32_t)pc < (uint32_t)__ram_image2_text_end__))) {
147 return 0;
148 } else {
149 return -1;
150 }
151 }
152
153 #if AOS_COMP_CLI
alios_debug_pc_show(int argc,char ** argv)154 void alios_debug_pc_show(int argc, char **argv)
155 {
156 aos_cli_printf("----- PC Addr ------\r\n");
157 aos_cli_printf("addr 1 : 0x%08X ~ 0x%08X\r\n", (uint32_t)__flash_text_start__, (uint32_t)__flash_text_end__);
158 aos_cli_printf("addr 2 : 0x%08X ~ 0x%08X\r\n", (uint32_t)__ram_image2_text_start__, (uint32_t)__ram_image2_text_end__);
159 }
160 #endif
161