1ENTRY(aos_2boot_Image2) 2 3INCLUDE "platform/mcu/rtl8710bn/script/export-rom_symbol_v01.txt" 4 5GROUP ( 6 libc.a 7 libnosys.a 8) 9 10MEMORY 11{ 12 ROM (rx) : ORIGIN = 0x00000000, LENGTH = 0x80000 /* ROM: 512k */ 13 ROMBSS_RAM (rw) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* ROM BSS RAM: 8K */ 14 BOOTLOADER_RAM (rwx) : ORIGIN = 0x10002000, LENGTH = 0x3000 /* BOOT Loader RAM: 12K */ 15 BD_RAM (rwx) : ORIGIN = 0x10005000, LENGTH = 0x38000 /* MAIN RAM: 228 */ 16 ROM_BSS_RAM (rwx) : ORIGIN = 0x1003D000, LENGTH = 0x1000 /* ROM BSS RAM: 4K */ 17 MSP_RAM (wx) : ORIGIN = 0x1003E000, LENGTH = 0x1000 /* MSP RAM: 4k */ 18 RDP_RAM (wx) : ORIGIN = 0x1003F000, LENGTH = 0xFF0 /* RDP RAM: 4k-0x10 */ 19 20 XIPBOOT (rx) : ORIGIN = 0x08000000+0x20, LENGTH = 0x04000-0x20 /* XIPBOOT: 32k, 32 Bytes resvd for header*/ 21 XIPSYS (r) : ORIGIN = 0x08009000, LENGTH = 0x1000 /* XIPSYS: 4K system data in flash */ 22 XIPCAL (r) : ORIGIN = 0x0800A000, LENGTH = 0x1000 /* XIPCAL: 4K calibration data in flash */ 23 XIP1 (rx) : ORIGIN = 0x0800B000+0x20, LENGTH = 0x6000-0x20 /* XIP1: 968k, 32 Bytes resvd for header */ 24} 25 26 27 28SECTIONS 29{ 30 .rom.text : { } > ROM 31 .rom.rodata : { } > ROM 32 .ARM.exidx : 33 { 34 __exidx_start = .; 35 *(.ARM.exidx*) 36 *(.gnu.linkonce.armexidx.*) 37 __exidx_end = .; 38 } > ROM 39 .hal.rom.bss : { } > ROMBSS_RAM 40 41 /* image1 entry, this section should in RAM and fixed address for ROM */ 42 .ram_image1.entry : 43 { 44 __ram_image1_text_start__ = .; 45 __ram_start_table_start__ = .; 46 KEEP(*(SORT(.image1.entry.data*))) 47 __ram_start_table_end__ = .; 48 49 __image1_validate_code__ = .; 50 KEEP(*(.image1.validate.rodata*)) 51 KEEP(*(.image1.export.symb*)) 52 } > BOOTLOADER_RAM 53 54 /* Add . to assign the start address of the section */ 55 /* to prevent the change of the start address by ld doing section alignment */ 56 .ram_image1.text . : 57 { 58 /* image1 text */ 59 *(.boot.ram.text*) 60 *(.boot.rodata*) 61 } > BOOTLOADER_RAM 62 63 .ram_image1.data . : 64 { 65 __ram_image1_data_start__ = .; 66 KEEP(*(.boot.ram.data*)) 67 __ram_image1_data_end__ = .; 68 69 __ram_image1_text_end__ = .; 70 } > BOOTLOADER_RAM 71 72 .ram_image1.bss . : 73 { 74 __image1_bss_start__ = .; 75 KEEP(*(.boot.ram.bss*)) 76 KEEP(*(.boot.ram.end.bss*)) 77 __image1_bss_end__ = .; 78 } > BOOTLOADER_RAM 79 80 .ram_image2.entry : 81 { 82 __ram_image2_text_start__ = .; 83 __image2_entry_func__ = .; 84 KEEP(*(SORT(.image2.entry.data*))) 85 86 __image2_validate_code__ = .; 87 KEEP(*(.image2.validate.rodata*)) 88 89 } > BD_RAM 90 91 .ram_image2.text : 92 { 93 KEEP(*(.image2.ram.text*)) 94 } > BD_RAM 95 96 .ram_image2.data : 97 { 98 __data_start__ = .; 99 *(.data*) 100 __data_end__ = .; 101 __ram_image2_text_end__ = .; 102 . = ALIGN(16); 103 } > BD_RAM 104 105 .ram_image2.bss : 106 { 107 __bss_start__ = .; 108 *(.bss*) 109 *(COMMON) 110 } > BD_RAM 111 112 .ram_image2.skb.bss : 113 { 114 *(.bdsram.data*) 115 __bss_end__ = .; 116 } > BD_RAM 117 118 .ram_heap.data : 119 { 120 *(.bfsram.data*) 121 } > BD_RAM 122 123 . = ALIGN(8); 124 PROVIDE(_rec_heap_start = .); 125 PROVIDE(_rec_heap_end = 0x1003CFFF); 126 PROVIDE(_rec_heap_len = _rec_heap_end - _rec_heap_start); 127 PROVIDE(end = 0x1003d000); 128 .rom.bss : 129 { 130 *(.heap.stdlib*) 131 } > ROM_BSS_RAM 132 133 .ram_rdp.text : 134 { 135 __rom_top_4k_start_ = .; 136 __rdp_text_start__ = .; 137 KEEP(*(.rdp.ram.text*)) 138 KEEP(*(.rdp.ram.data*)) 139 __rdp_text_end__ = .; 140 . = ALIGN(16); 141 142 } > RDP_RAM 143 144 .xip_image1.text : 145 { 146 __flash_boot_text_start__ = .; 147 148 *(.flashboot.text*) 149 150 __flash_boot_text_end__ = .; 151 152 . = ALIGN(16); 153 } > XIPBOOT 154 155 .xip_image2.text : 156 { 157 __flash_text_start__ = .; 158 159 *(.img2_custom_signature*) 160 *(.text) 161 *(.text*) 162 *(.rodata) 163 *(.rodata*) 164 *(.debug_trace*) 165 166 __flash_text_end__ = .; 167 168 . = ALIGN (16); 169 } > XIP1 170} 171 172SECTIONS 173{ 174 /* Bootloader symbol list */ 175 boot_export_symbol = 0x10002020; 176} 177