1/*
2 * Arm SCP/MCP Software
3 * Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 *
7 * Description:
8 *      Arm Compiler 6 scatter file.
9 */
10
11#include <arch_scatter.h>
12
13#if FMW_MEM_MODE == ARCH_MEM_MODE_SINGLE_REGION
14/*
15 * Single region memory layout:
16 *  - MEM0 accepts:
17 *      - Read-only sections
18 *      - Read-write sections
19 *      - Executable sections
20 */
21
22#    define ARCH_X_BASE +0
23#    define ARCH_R_BASE +0
24#    define ARCH_W_BASE +0
25#elif FMW_MEM_MODE == ARCH_MEM_MODE_DUAL_REGION_RELOCATION
26/*
27 * Dual region memory layout with initialized data relocation:
28 *  - MEM0 accepts:
29 *      - Read-only sections
30 *      - Executable sections
31 *
32 *  - MEM1 accepts:
33 *      - Read-write sections
34 */
35
36#    define ARCH_X_BASE +0
37#    define ARCH_R_BASE +0
38
39#    define ARCH_W_BASE FMW_MEM1_BASE
40#elif FMW_MEM_MODE == ARCH_MEM_MODE_DUAL_REGION_NO_RELOCATION
41    /*
42     * Dual region memory layout without initialized data relocation:
43     *  - MEM0 accepts:
44     *      - Executable sections
45     *
46     *  - MEM1 accepts:
47     *      - Read-only sections
48     *      - Read-write sections
49     */
50
51#    define ARCH_X_BASE +0
52
53#    define ARCH_R_BASE FMW_MEM1_BASE
54#    define ARCH_W_BASE +0
55#endif
56
57#if FMW_MEM_MODE == ARCH_MEM_MODE_SINGLE_REGION
58#    define ARCH_W_LIMIT ARCH_MEM0_LIMIT
59#else
60#    define ARCH_W_LIMIT ARCH_MEM1_LIMIT
61#endif
62
63LR_FIRMWARE FMW_MEM0_BASE {
64    ER_EXCEPTIONS ARCH_X_BASE {
65        *(.exceptions)
66    }
67
68    ER_TEXT +0 {
69        *(+CODE)
70    }
71
72    ER_RODATA ARCH_R_BASE {
73        *(+CONST)
74    }
75
76    ER_DATA ARCH_W_BASE {
77        *(+DATA)
78    }
79
80    ER_BSS +0 {
81        *(+BSS)
82    }
83
84    ARM_LIB_STACKHEAP +0 EMPTY (ARCH_W_LIMIT - +0) { }
85}
86