1\ingroup GroupModules Modules 2\defgroup GroupApRemap AP Remap 3 4Module AP Remap Design 5====================== 6 7# Overview 8 9The Manageability and System Control Processors (MSCP) in some of the Arm's 10Reference Design platforms are based on 32-bit Cortex-M7 processor and can 11address up to 4GB of address space. These sub-systems can also address the lower 122GB of the application processor's address space using the expansion ports that 13are directly mapped into 2GB of the MSCP's address space. For accessing any 14address above the lower 2GB address space of application processor or the 15address space of other chips in multi-chip configuration, MSCP uses and an 16address translation controller. The functionality of this controller and the 17overall application processor addressing from MSCP is described below. 18 19# Multi-chip AP Remap Overview 20 21For all memory accesses generated by MSCP which falls within the System Access 22Port window, the memory remapping applied to that address is illustrated below. 23 24``` 25 +------------------------------+ 26 | Remap to | 27 | {ADDR_TRANS[47:20 bits], +---------------------------->+ 28 | Incoming address[19:0 bits]} | | 29 +--------------+---------------+ | 30 ^ | 31 | Yes | 32 | | 33 +----------+------------+ | 34 | Address in range | No | 35 | {0x0_2B00_0000 +------------------------------->+ 36 | to 0x0_2B0F_ FFFF} + | | 37 | 4TB * CHIP_ID ? | | 38 +---------+-------------+ | 39 ^ | 40 MSCP Memory Space | | 41 | | 42 0xFFFF_FFFF +--------------------------+ +-----+--------+ | 43 | | | Address | No | 44 | | | Translation +------------------------------------>+ 45 | | | enabled? | | 46 | | +-----+--------+ | 47 | | ^ | 48 | | | | 49 | | | | 50 | | +-------------+-------------+ 0x3FFF_FFFF + 4TB * CHIP_ID | 51 0xE000_0000 +--------------------------+ | | | 52 | | | remap to 4TB * CHIP_ID + | | 53 | | | 0GB to 1GB of | | 54 | System Access Port 1 +------->+ Application Processor | | 55 | | | Memory Space | | 56 | | +---------------------------+ 0x0000_0000 + 4TB * CHIP_ID | 57 0xA000_0000 +--------------------------+ | 58 | | +-----+--------+ +---------------------------+ 0x01_7FFF_FFFF + 4TB * CHIP_ID 59 | | | CMN Addr | Yes | | | 60 | System Access Port 0 +-------->+ Translation +------->+ remap to 4TB * CHIP_ID + | | 61 | | | enabled? | | CMN Configuration | | 62 | | +-----+--------+ | region in AP | | 63 0x6000_0000 +--------------------------+ | | Memory Space | | 64 | | | No +-------------+-------------+ 0x01_4000_0000 + 4TB * CHIP_ID 65 | | | | | 66 | | v | | 67 | | +-----+---------------------+ 0x7FFF_FFFF + 4TB * CHIP_ID | 68 | | | | | | 69 | | + remap to 4TB * CHIP_ID + | | | 70 | | | 1GB to 2GB of | | | 71 | | | Application Processor | | | 72 | | | Memory Space | | | 73 | | +-------------+-------------+ 0x4000_0000 + 4TB * CHIP_ID | 74 | | | | | 75 | | | | | 76 0x0000_0000 +--------------------------+ | v | 77 +-----------------------+---------------------+ 78 | 79 | 80 v 81 To Interconnect 82``` 83 84 - MSCP to access the lower 2GB of the application processor memory space 85 through the "System Access Port" window in the MSCP address space. The 86 memory map of System Access Port window memory to the application 87 processor memory map is shown below. 88 89 System Access Port Application Processor Memory Map 90 ------------------ -------------------------------- 91 0x6000_0000 - 0x9FFF_FFFF -> 0x4000_0000 - 0x7FFF_FFFF 92 0xA000_0000 - 0xFFFF_FFFF -> 0x0000_0000 - 0x3FFF_FFFF 93 94 - MSCP to access 2GB and above address space of the local chip's application 95 processor memory space or remote chip's application processor memory space. 96 This is limited to 1MB access at a time. 97 98# Module design 99 100The AP Remap module provides the ability to configure the System Access Port 101translations. A module that accesses the AP memory space, can bind to the AP 102Remap module and access the memory location by using the `access_ap_memory()` 103api. 104 1051. For an address that falls within the first 2GB range of application processor 106 memory space (System Access Port 0 or 1), the access is completed by the 107 above defined memory translation. 108 1092. For an address that falls above the 2GB range of application processor memory 110 space, this function enables the AP Remap register from the MSCP PIK register 111 space and uses the System Access Port 1's 1MB windowing range to access the 112 required address. 113 114The AP Remap results in changing the address passed to the bus and hence the 115interrupts are disabled to enforce serialization between access to this API. 116 117# Support for CMN AP Remap 118 119On reference design platforms that map the CMN controller above 4GB of the 120application processor address space, the `CMN_ATRANS_EN` bit in SCP PIK register 121space allows the CMN controller to be mapped into MSCP addressable space. 122Setting this bit will translate MSCP's `0x6000_0000 - 0x9FFF_FFFFF` to 123`(4TB * CHIPID) + (CMN register offset)` 124 125## Code Snippet 126 127```c 128 129access_ap_memory_1mb_window(uint64t addr): 130 disable_interrupts(); 131 DSB() 132 if(cmn_addr_trans_bit_set): 133 disable_cmn_addr_trans(); 134 enable_addr_trans( with addr_47_20 ) 135 read(0x0_CB00_0000 + addr_19_0) 136 // 137 // or access_ap_memory(0x0_2B00_0000 + addr_19_0) but avoiding recursion 138 // under critical section 139 // 140 DSB() 141 if(cmn_addr_trans_bit_set): 142 enable_cmn_addr_trans(); 143 enable_interrupts() 144 145 146access_ap_memory(uint64t addr): 147 if (addr >= 0x0_0000_0000 <= 0x0_3FFF_FFFF): // first 1GB block 148 read(addr + 0x0_A000_0000); 149 else if (addr >= 0x0_4000_0000 <= 0x0_7FFF_FFFF): // second 1GB block 150 if(cmn_addr_trans_bit_set): 151 disable_cmn_addr_trans(); 152 read(addr + 0x0_2000_0000) 153 if(cmn_addr_trans_bit_set): 154 enable_cmn_addr_trans(); 155 elseif (addr > 0x0_7FFF_FFFF): 156 access_ap_memory_1mb_window(addr) 157``` 158