1 /* 2 * Arm SCP/MCP Software 3 * Copyright (c) 2017-2021, Arm Limited and Contributors. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef MHU2_H 9 #define MHU2_H 10 11 #include <fwk_macros.h> 12 13 #include <stdint.h> 14 15 #define CHANNEL_MAX 124 16 17 struct mhu2_id_reg { 18 FWK_R uint32_t PID4; 19 uint8_t RESERVED1[0x10 - 0x4]; 20 FWK_R uint32_t PID0; 21 FWK_R uint32_t PID1; 22 FWK_R uint32_t PID2; 23 FWK_R uint32_t PID3; 24 FWK_R uint32_t COMPID0; 25 FWK_R uint32_t COMPID1; 26 FWK_R uint32_t COMPID2; 27 FWK_R uint32_t COMPID3; 28 }; 29 30 struct mhu2_send_channel_reg { 31 FWK_R uint32_t STAT; 32 uint8_t RESERVED0[0xC - 0x4]; 33 FWK_W uint32_t STAT_SET; 34 uint8_t RESERVED1[0x20 - 0x10]; 35 }; 36 37 struct mhu2_send_reg { 38 struct mhu2_send_channel_reg channel[CHANNEL_MAX]; 39 FWK_R uint32_t MSG_NO_CAP; 40 FWK_RW uint32_t RESP_CFG; 41 FWK_RW uint32_t ACCESS_REQUEST; 42 FWK_R uint32_t ACCESS_READY; 43 FWK_R uint32_t INT_ACCESS_STAT; 44 FWK_W uint32_t INT_ACCESS_CLR; 45 FWK_W uint32_t INT_ACCESS_EN; 46 uint8_t RESERVED0[0xFD0 - 0xF9C]; 47 struct mhu2_id_reg id; 48 }; 49 50 struct mhu2_recv_channel_reg { 51 FWK_R uint32_t STAT; 52 FWK_R uint32_t STAT_PEND; 53 FWK_W uint32_t STAT_CLEAR; 54 uint8_t RESERVED0[0x10 - 0x0C]; 55 FWK_R uint32_t MASK; 56 FWK_W uint32_t MASK_SET; 57 FWK_W uint32_t MASK_CLEAR; 58 uint8_t RESERVED1[0x20 - 0x1C]; 59 }; 60 61 struct mhu2_recv_reg { 62 struct mhu2_recv_channel_reg channel[CHANNEL_MAX]; 63 FWK_R uint32_t MSG_NO_CAP; 64 uint8_t RESERVED0[0xFD0 - 0xF84]; 65 struct mhu2_id_reg id; 66 }; 67 68 #endif /* MHU2_H */ 69