1 /*
2  * Arm SCP/MCP Software
3  * Copyright (c) 2015-2021, Arm Limited and Contributors. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  *
7  * Description:
8  *      SCMI performance domain management protocol support.
9  */
10 
11 #ifndef INTERNAL_SCMI_PERF_H
12 #define INTERNAL_SCMI_PERF_H
13 
14 #include <stdint.h>
15 
16 #define SCMI_PROTOCOL_VERSION_PERF UINT32_C(0x20000)
17 
18 #define SCMI_PERF_SUPPORTS_STATS_SHARED_MEM_REGION  0
19 #define SCMI_PERF_STATS_SHARED_MEM_REGION_ADDR_LOW  0
20 #define SCMI_PERF_STATS_SHARED_MEM_REGION_ADDR_HIGH 0
21 #define SCMI_PERF_STATS_SHARED_MEM_REGION_LENGTH    0
22 
23 enum scmi_perf_notification_id {
24     SCMI_PERF_LIMITS_CHANGED = 0x000,
25     SCMI_PERF_LEVEL_CHANGED = 0x001,
26 };
27 
28 /*
29  * PROTOCOL_ATTRIBUTES
30  */
31 
32 #define SCMI_PERF_PROTOCOL_ATTRIBUTES_POWER_MW_POS     16
33 #define SCMI_PERF_PROTOCOL_ATTRIBUTES_NUM_DOMAINS_POS   0
34 
35 #define SCMI_PERF_PROTOCOL_ATTRIBUTES_POWER_MW_MASK \
36     (UINT32_C(0x1) << SCMI_PERF_PROTOCOL_ATTRIBUTES_POWER_MW_POS)
37 #define SCMI_PERF_PROTOCOL_ATTRIBUTES_NUM_DOMAINS_MASK   \
38     (UINT32_C(0xFFFF) << SCMI_PERF_PROTOCOL_ATTRIBUTES_NUM_DOMAINS_POS)
39 
40 #define SCMI_PERF_PROTOCOL_ATTRIBUTES(POWER_MW, NUM_DOMAINS) \
41     ( \
42         (((POWER_MW) << SCMI_PERF_PROTOCOL_ATTRIBUTES_POWER_MW_POS) & \
43             SCMI_PERF_PROTOCOL_ATTRIBUTES_POWER_MW_MASK) | \
44         (((NUM_DOMAINS) << SCMI_PERF_PROTOCOL_ATTRIBUTES_NUM_DOMAINS_POS) & \
45             SCMI_PERF_PROTOCOL_ATTRIBUTES_NUM_DOMAINS_MASK) \
46     )
47 
48 struct scmi_perf_protocol_attributes_p2a {
49     int32_t status;
50     uint32_t attributes;
51     uint32_t statistics_address_low;
52     uint32_t statistics_address_high;
53     uint32_t statistics_len;
54 };
55 
56 /*
57  * PERFORMANCE_DOMAIN_ATTRIBUTES
58  */
59 
60 #define SCMI_PERF_DOMAIN_ATTRIBUTES_CAN_SET_LIMITS_POS 31U
61 #define SCMI_PERF_DOMAIN_ATTRIBUTES_CAN_SET_LEVEL_POS  30U
62 #define SCMI_PERF_DOMAIN_ATTRIBUTES_LIMITS_NOTIFY_POS  29U
63 #define SCMI_PERF_DOMAIN_ATTRIBUTES_LEVEL_NOTIFY_POS   28U
64 #define SCMI_PERF_DOMAIN_ATTRIBUTES_FAST_CHANNEL_POS   27U
65 
66 #define SCMI_PERF_DOMAIN_ATTRIBUTES_CAN_SET_LIMITS_MASK \
67     (UINT32_C(0x1) << SCMI_PERF_DOMAIN_ATTRIBUTES_CAN_SET_LIMITS_POS)
68 #define SCMI_PERF_DOMAIN_ATTRIBUTES_CAN_SET_LEVEL_MASK \
69     (UINT32_C(0x1) << SCMI_PERF_DOMAIN_ATTRIBUTES_CAN_SET_LEVEL_POS)
70 
71 #define SCMI_PERF_DOMAIN_ATTRIBUTES_LIMITS_NOTIFY_MASK \
72     (UINT32_C(0x1) << SCMI_PERF_DOMAIN_ATTRIBUTES_LIMITS_NOTIFY_POS)
73 #define SCMI_PERF_DOMAIN_ATTRIBUTES_LEVEL_NOTIFY_MASK \
74     (UINT32_C(0x1) << SCMI_PERF_DOMAIN_ATTRIBUTES_LEVEL_NOTIFY_POS)
75 
76 #define SCMI_PERF_FC_MIN_RATE_LIMIT     4000
77 
78 #define SCMI_PERF_DOMAIN_ATTRIBUTES_FAST_CHANNEL_MASK \
79     (UINT32_C(0x1) << SCMI_PERF_DOMAIN_ATTRIBUTES_FAST_CHANNEL_POS)
80 
81 #define SCMI_PERF_DOMAIN_ATTRIBUTES_FAST_CHANNEL_MASK \
82     (UINT32_C(0x1) << SCMI_PERF_DOMAIN_ATTRIBUTES_FAST_CHANNEL_POS)
83 
84 #define SCMI_PERF_DOMAIN_ATTRIBUTES(LEVEL_NOTIFY, LIMITS_NOTIFY, \
85                                     CAN_SET_LEVEL, CAN_SET_LIMITS, \
86                                     FAST_CHANNEL) \
87     ( \
88         (((LEVEL_NOTIFY) << \
89             SCMI_PERF_DOMAIN_ATTRIBUTES_LEVEL_NOTIFY_POS) & \
90             SCMI_PERF_DOMAIN_ATTRIBUTES_LEVEL_NOTIFY_MASK) | \
91         (((LIMITS_NOTIFY) << \
92             SCMI_PERF_DOMAIN_ATTRIBUTES_LIMITS_NOTIFY_POS) & \
93             SCMI_PERF_DOMAIN_ATTRIBUTES_LIMITS_NOTIFY_MASK) | \
94         (((CAN_SET_LEVEL) << \
95             SCMI_PERF_DOMAIN_ATTRIBUTES_CAN_SET_LEVEL_POS) & \
96             SCMI_PERF_DOMAIN_ATTRIBUTES_CAN_SET_LEVEL_MASK) | \
97         (((CAN_SET_LIMITS) << \
98             SCMI_PERF_DOMAIN_ATTRIBUTES_CAN_SET_LIMITS_POS) & \
99             SCMI_PERF_DOMAIN_ATTRIBUTES_CAN_SET_LIMITS_MASK) | \
100         (((FAST_CHANNEL) << \
101             SCMI_PERF_DOMAIN_ATTRIBUTES_FAST_CHANNEL_POS) & \
102             SCMI_PERF_DOMAIN_ATTRIBUTES_FAST_CHANNEL_MASK) \
103     )
104 
105 struct scmi_perf_domain_attributes_a2p {
106     uint32_t domain_id;
107 };
108 
109 #define SCMI_PERF_DOMAIN_RATE_LIMIT_POS  0
110 #define SCMI_PERF_DOMAIN_RATE_LIMIT_MASK \
111     (UINT32_C(0xFFFFF) << SCMI_PERF_DOMAIN_RATE_LIMIT_POS)
112 
113 struct scmi_perf_domain_attributes_p2a {
114     int32_t status;
115     uint32_t attributes;
116     uint32_t rate_limit;
117     uint32_t sustained_freq;
118     uint32_t sustained_perf_level;
119     uint8_t name[16];
120 };
121 
122 /*
123  * PERFORMANCE_DESCRIBE_LEVELS
124  */
125 
126 #define SCMI_PERF_LEVELS_MAX(MAILBOX_SIZE) \
127     ((sizeof(struct scmi_perf_describe_levels_p2a) < MAILBOX_SIZE)  ? \
128      ((MAILBOX_SIZE - sizeof(struct scmi_perf_describe_levels_p2a))   \
129         / sizeof(struct scmi_perf_level)) : 0)
130 
131 #define SCMI_PERF_LEVEL_ATTRIBUTES_POS  0
132 #define SCMI_PERF_LEVEL_ATTRIBUTES_MASK \
133     (UINT32_C(0xFFFF) << SCMI_PERF_LEVEL_ATTRIBUTES_POS)
134 
135 #define SCMI_PERF_LEVEL_ATTRIBUTES(LATENCY) \
136     (((LATENCY) << SCMI_PERF_LEVEL_ATTRIBUTES_POS) & \
137         SCMI_PERF_LEVEL_ATTRIBUTES_MASK)
138 
139 struct scmi_perf_level {
140     uint32_t performance_level;
141     uint32_t power_cost;
142     uint32_t attributes;
143 };
144 
145 struct scmi_perf_describe_levels_a2p {
146     uint32_t domain_id;
147     uint32_t level_index;
148 };
149 
150 #define SCMI_PERF_NUM_LEVELS_REMAINING_LEVELS_POS  16
151 #define SCMI_PERF_NUM_LEVELS_NUM_LEVELS_POS        0
152 
153 #define SCMI_PERF_NUM_LEVELS_REMAINING_LEVELS_MASK \
154     (UINT32_C(0xFFFF) << SCMI_PERF_NUM_LEVELS_REMAINING_LEVELS_POS)
155 #define SCMI_PERF_NUM_LEVELS_NUM_LEVELS_MASK \
156     (UINT32_C(0xFFF) << SCMI_PERF_NUM_LEVELS_NUM_LEVELS_POS)
157 
158 #define SCMI_PERF_NUM_LEVELS(NUM_LEVELS, REMAINING_LEVELS) \
159     ((((NUM_LEVELS) << SCMI_PERF_NUM_LEVELS_NUM_LEVELS_POS) & \
160         SCMI_PERF_NUM_LEVELS_NUM_LEVELS_MASK) | \
161      (((REMAINING_LEVELS) << SCMI_PERF_NUM_LEVELS_REMAINING_LEVELS_POS) & \
162         SCMI_PERF_NUM_LEVELS_REMAINING_LEVELS_MASK))
163 
164 struct scmi_perf_describe_levels_p2a {
165     int32_t status;
166     uint32_t num_levels;
167 
168     struct scmi_perf_level perf_levels[];
169 };
170 
171 /*
172  * PERFORMANCE_LIMITS_SET
173  */
174 
175 struct scmi_perf_limits_set_a2p {
176     uint32_t domain_id;
177     uint32_t range_max;
178     uint32_t range_min;
179 };
180 
181 struct scmi_perf_limits_set_p2a {
182     int32_t status;
183 };
184 
185 /*
186  * PERFORMANCE_LIMITS_GET
187  */
188 
189 struct scmi_perf_limits_get_a2p {
190     uint32_t domain_id;
191 };
192 
193 struct scmi_perf_limits_get_p2a {
194     int32_t status;
195     uint32_t range_max;
196     uint32_t range_min;
197 };
198 
199 /*
200  * PERFORMANCE_LEVEL_SET
201  */
202 
203 struct scmi_perf_level_set_a2p {
204     uint32_t domain_id;
205     uint32_t performance_level;
206 };
207 
208 struct scmi_perf_level_set_p2a {
209     int32_t status;
210 };
211 
212 /*
213  * PERFORMANCE_LEVEL_GET
214  */
215 
216 struct scmi_perf_level_get_a2p {
217     uint32_t domain_id;
218 };
219 
220 struct scmi_perf_level_get_p2a {
221     int32_t status;
222     uint32_t performance_level;
223 };
224 
225 /*
226  * PERFORMANCE_NOTIFY_LIMITS
227  */
228 
229 #define SCMI_PERF_NOTIFY_LIMITS_NOTIFY_ENABLE_MASK UINT32_C(0x1)
230 
231 struct scmi_perf_notify_limits_a2p {
232     uint32_t domain_id;
233     uint32_t notify_enable;
234 };
235 
236 struct scmi_perf_notify_limits_p2a {
237     int32_t status;
238 };
239 
240 /*
241  * PERFORMANCE_NOTIFY_LEVEL
242  */
243 
244 #define SCMI_PERF_NOTIFY_LEVEL_NOTIFY_ENABLE_MASK UINT32_C(0x1)
245 
246 struct scmi_perf_notify_level_a2p {
247     uint32_t domain_id;
248     uint32_t notify_enable;
249 };
250 
251 struct scmi_perf_notify_level_p2a {
252     int32_t status;
253 };
254 
255 /*
256  * PERFORMANCE_LEVEL_CHANGED
257  */
258 struct scmi_perf_level_changed {
259     uint32_t agent_id;
260     uint32_t domain_id;
261     uint32_t performance_level;
262 };
263 
264 /*
265  * PERFORMANCE_LIMITS_CHANGED
266  */
267 struct scmi_perf_limits_changed {
268     uint32_t agent_id;
269     uint32_t domain_id;
270     uint32_t range_max;
271     uint32_t range_min;
272 };
273 
274 /*
275  * PERFORMANCE_DESCRIBE_FASTCHANNEL
276  */
277 
278 struct scmi_perf_describe_fc_a2p {
279     uint32_t domain_id;
280     uint32_t message_id;
281 };
282 
283 struct scmi_perf_describe_fc_p2a {
284     int32_t status;
285     uint32_t attributes;
286     uint32_t rate_limit;
287     uint32_t chan_addr_low;
288     uint32_t chan_addr_high;
289     uint32_t chan_size;
290     uint32_t doorbell_addr_low;
291     uint32_t doorbell_addr_high;
292     uint32_t doorbell_set_mask_low;
293     uint32_t doorbell_set_mask_high;
294     uint32_t doorbell_preserve_mask_low;
295     uint32_t doorbell_preserve_mask_high;
296 };
297 
298 #endif /* INTERNAL_SCMI_PERF_H */
299