1 /*
2  * Arm SCP/MCP Software
3  * Copyright (c) 2020-2021, Arm Limited and Contributors. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include "config_clock.h"
9 #include "config_power_domain.h"
10 #include "morello_core.h"
11 
12 #include <mod_clock.h>
13 #include <mod_css_clock.h>
14 #include <mod_pik_clock.h>
15 #include <mod_power_domain.h>
16 
17 #include <fwk_element.h>
18 #include <fwk_id.h>
19 #include <fwk_module.h>
20 #include <fwk_module_idx.h>
21 
22 static const struct fwk_element clock_dev_desc_table[] = {
23     [CLOCK_IDX_INTERCONNECT] =
24         {
25             .name = "Interconnect",
26             .data = &((struct mod_clock_dev_config){
27                 .driver_id = FWK_ID_ELEMENT_INIT(
28                     FWK_MODULE_IDX_PIK_CLOCK,
29                     CLOCK_PIK_IDX_INTERCONNECT),
30                 .api_id = FWK_ID_API_INIT(
31                     FWK_MODULE_IDX_PIK_CLOCK,
32                     MOD_PIK_CLOCK_API_TYPE_CLOCK),
33             }),
34         },
35     [CLOCK_IDX_CPU_GROUP0] =
36         {
37             .name = "CPU_GROUP0",
38             .data = &((struct mod_clock_dev_config){
39                 .driver_id = FWK_ID_ELEMENT_INIT(
40                     FWK_MODULE_IDX_CSS_CLOCK,
41                     CLOCK_CSS_IDX_CPU_GROUP0),
42                 .api_id = FWK_ID_API_INIT(
43                     FWK_MODULE_IDX_CSS_CLOCK,
44                     MOD_CSS_CLOCK_API_TYPE_CLOCK),
45             }),
46         },
47     [CLOCK_IDX_CPU_GROUP1] =
48         {
49             .name = "CPU_GROUP1",
50             .data = &((struct mod_clock_dev_config){
51                 .driver_id = FWK_ID_ELEMENT_INIT(
52                     FWK_MODULE_IDX_CSS_CLOCK,
53                     CLOCK_CSS_IDX_CPU_GROUP1),
54                 .api_id = FWK_ID_API_INIT(
55                     FWK_MODULE_IDX_CSS_CLOCK,
56                     MOD_CSS_CLOCK_API_TYPE_CLOCK),
57             }),
58         },
59     { 0 }, /* Termination description. */
60 };
61 
clock_get_dev_desc_table(fwk_id_t module_id)62 static const struct fwk_element *clock_get_dev_desc_table(fwk_id_t module_id)
63 {
64     unsigned int i;
65     struct mod_clock_dev_config *dev_config;
66 
67     for (i = 0; i < CLOCK_IDX_COUNT; i++) {
68         dev_config =
69             (struct mod_clock_dev_config *)clock_dev_desc_table[i].data;
70         dev_config->pd_source_id = fwk_id_build_element_id(
71             fwk_module_id_power_domain, PD_SINGLE_CHIP_IDX_SYSTOP0);
72     }
73 
74     return clock_dev_desc_table;
75 }
76 
77 const struct fwk_module_config config_clock = {
78     .elements = FWK_MODULE_DYNAMIC_ELEMENTS(clock_get_dev_desc_table),
79     .data = &((struct mod_clock_config){
80         .pd_transition_notification_id = FWK_ID_NOTIFICATION_INIT(
81             FWK_MODULE_IDX_POWER_DOMAIN,
82             MOD_PD_NOTIFICATION_IDX_POWER_STATE_TRANSITION),
83         .pd_pre_transition_notification_id = FWK_ID_NOTIFICATION_INIT(
84             FWK_MODULE_IDX_POWER_DOMAIN,
85             MOD_PD_NOTIFICATION_IDX_POWER_STATE_PRE_TRANSITION),
86     }),
87 
88 };
89