1 /*
2  * Arm SCP/MCP Software
3  * Copyright (c) 2020-2021, Arm Limited and Contributors. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include "config_clock.h"
9 #include "morello_scp_mmap.h"
10 
11 #include <mod_cmn_skeena.h>
12 
13 #include <fwk_id.h>
14 #include <fwk_macros.h>
15 #include <fwk_module.h>
16 #include <fwk_module_idx.h>
17 
18 #include <stdbool.h>
19 #include <stddef.h>
20 #include <stdint.h>
21 
22 /*
23  * CMN_SKEENA nodes
24  */
25 #define DMC0_ID 0x104
26 #define DMC1_ID 0x10C
27 #define NODE_ID_HND 0x44
28 #define NODE_ID_SBSX 0x80
29 
30 static const unsigned int snf_table[] = {
31     DMC0_ID, /* Maps to HN-F logical node 0 */
32     DMC0_ID, /* Maps to HN-F logical node 1 */
33     DMC1_ID, /* Maps to HN-F logical node 2 */
34     DMC1_ID, /* Maps to HN-F logical node 3 */
35 };
36 
37 static const struct mod_cmn_skeena_memory_region_map mmap[] = {
38     {
39         /*
40          * System cache backed region
41          * Map: 0x0000_0000_0000 - 0x07FF_FFFF_FFFF (8 TB)
42          */
43         .base = UINT64_C(0x000000000000),
44         .size = UINT64_C(8) * FWK_TIB,
45         .type = MOD_CMN_SKEENA_MEMORY_REGION_TYPE_SYSCACHE,
46     },
47     {
48         /*
49          * Boot region
50          * Map: 0x0000_0000_0000 - 0x0000_07FF_FFFF (128 MB)
51          */
52         .base = UINT64_C(0x000000000000),
53         .size = UINT64_C(128) * FWK_MIB,
54         .type = MOD_CMN_SKEENA_REGION_TYPE_SYSCACHE_SUB,
55         .node_id = NODE_ID_SBSX,
56     },
57     {
58         /*
59          * Peripherals
60          * Map: 0x00_0800_0000 - 0x00_0FFF_FFFF (128 MB)
61          */
62         .base = UINT64_C(0x0008000000),
63         .size = UINT64_C(128) * FWK_MIB,
64         .type = MOD_CMN_SKEENA_MEMORY_REGION_TYPE_IO,
65         .node_id = NODE_ID_HND,
66     },
67     {
68         /*
69          * Peripherals
70          * Map: 0x00_1000_0000 - 0x00_1FFF_FFFF (256 MB)
71          */
72         .base = UINT64_C(0x0010000000),
73         .size = UINT64_C(256) * FWK_MIB,
74         .type = MOD_CMN_SKEENA_MEMORY_REGION_TYPE_IO,
75         .node_id = NODE_ID_HND,
76     },
77     {
78         /*
79          * Peripherals
80          * Map: 0x00_2000_0000 - 0x00_3FFF_FFFF (512 MB)
81          */
82         .base = UINT64_C(0x0020000000),
83         .size = UINT64_C(512) * FWK_MIB,
84         .type = MOD_CMN_SKEENA_MEMORY_REGION_TYPE_IO,
85         .node_id = NODE_ID_HND,
86     },
87     {
88         /*
89          * Peripherals
90          * Map: 0x00_4000_0000 - 0x00_7FFF_FFFF (1 GB)
91          */
92         .base = UINT64_C(0x0040000000),
93         .size = UINT64_C(1) * FWK_GIB,
94         .type = MOD_CMN_SKEENA_MEMORY_REGION_TYPE_IO,
95         .node_id = NODE_ID_HND,
96     },
97     {
98         /*
99          * Peripherals
100          * Map: 0x04_0000_0000 - 0x07_FFFF_FFFF (16 GB)
101          */
102         .base = UINT64_C(0x0400000000),
103         .size = UINT64_C(16) * FWK_GIB,
104         .type = MOD_CMN_SKEENA_MEMORY_REGION_TYPE_IO,
105         .node_id = NODE_ID_HND,
106     },
107     {
108         /*
109          * Peripherals
110          * Map: 0x08_0000_0000 - 0x0F_FFFF_FFFF (32 GB)
111          */
112         .base = UINT64_C(0x0800000000),
113         .size = UINT64_C(32) * FWK_GIB,
114         .type = MOD_CMN_SKEENA_MEMORY_REGION_TYPE_IO,
115         .node_id = NODE_ID_HND,
116     },
117     {
118         /*
119          * Peripherals
120          * Map: 0x10_0000_0000 - 0x1F_FFFF_FFFF (64 GB)
121          */
122         .base = UINT64_C(0x1000000000),
123         .size = UINT64_C(64) * FWK_GIB,
124         .type = MOD_CMN_SKEENA_MEMORY_REGION_TYPE_IO,
125         .node_id = NODE_ID_HND,
126     },
127     {
128         /*
129          * Peripherals
130          * Map: 0x20_0000_0000 - 0x3F_FFFF_FFFF (128 GB)
131          */
132         .base = UINT64_C(0x2000000000),
133         .size = UINT64_C(128) * FWK_GIB,
134         .type = MOD_CMN_SKEENA_REGION_TYPE_SYSCACHE_NONHASH,
135         .node_id = NODE_ID_HND,
136     },
137     {
138         /*
139          * Peripherals
140          * Map: 0x40_0000_0000 - 0x7F_FFFF_FFFF (256 GB)
141          */
142         .base = UINT64_C(0x4000000000),
143         .size = UINT64_C(256) * FWK_GIB,
144         .type = MOD_CMN_SKEENA_REGION_TYPE_SYSCACHE_NONHASH,
145         .node_id = NODE_ID_HND,
146     },
147     {
148         /*
149          * Peripherals
150          * Map: 0x80_0000_0000 - 0x80_7FFF_FFFF (512 GB - 514 GB)
151          */
152         .base = UINT64_C(0x8000000000),
153         .size = UINT64_C(2) * FWK_GIB,
154         .type = MOD_CMN_SKEENA_REGION_TYPE_SYSCACHE_NONHASH,
155         .node_id = NODE_ID_HND,
156     },
157 };
158 
159 const struct fwk_module_config config_cmn_skeena = {
160     .data =
161         &(struct mod_cmn_skeena_config){
162             .base = SCP_CMN_SKEENA_BASE,
163             .mesh_size_x = 5,
164             .mesh_size_y = 2,
165             .hnd_node_id = NODE_ID_HND,
166             .snf_table = snf_table,
167             .snf_count = FWK_ARRAY_SIZE(snf_table),
168             .sa_count = 2,
169             .mmap_table = mmap,
170             .mmap_count = FWK_ARRAY_SIZE(mmap),
171             .chip_addr_space = UINT64_C(4) * FWK_TIB,
172             .clock_id = FWK_ID_ELEMENT_INIT(
173                 FWK_MODULE_IDX_CLOCK,
174                 CLOCK_IDX_INTERCONNECT),
175             .hnf_cal_mode = false,
176         },
177 };
178