1 /*
2  * Renesas SCP/MCP Software
3  * Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights
4  * reserved.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #ifndef CLOCK_SD_DEVICES_H
10 #define CLOCK_SD_DEVICES_H
11 
12 /*!
13  * \brief Clock device indexes.
14  */
15 enum clock_sd_parent_idx {
16     CLK_EXTAL,
17     CLK_OSC_EXTAL,
18     CLK_PLL1,
19     CLK_PLL1_DIV2,
20     CLK_PLL1_DIV4,
21     CLK_S0,
22     CLK_S1,
23     CLK_S2,
24     CLK_S3,
25     CLK_SDSRC,
26     CLOCK_PARENT_IDX_COUNT
27 };
28 
29 enum clock_sd_dev_idx {
30     CLOCK_SD_DEV_IDX_ZTR,
31     CLOCK_SD_DEV_IDX_ZTRD2,
32     CLOCK_SD_DEV_IDX_ZT,
33     CLOCK_SD_DEV_IDX_ZX,
34     CLOCK_SD_DEV_IDX_S0D1,
35     CLOCK_SD_DEV_IDX_S0D2,
36     CLOCK_SD_DEV_IDX_S0D3,
37     CLOCK_SD_DEV_IDX_S0D4,
38     CLOCK_SD_DEV_IDX_S0D6,
39     CLOCK_SD_DEV_IDX_S0D8,
40     CLOCK_SD_DEV_IDX_S0D12,
41     CLOCK_SD_DEV_IDX_S1D1,
42     CLOCK_SD_DEV_IDX_S1D2,
43     CLOCK_SD_DEV_IDX_S1D4,
44     CLOCK_SD_DEV_IDX_S2D1,
45     CLOCK_SD_DEV_IDX_S2D2,
46     CLOCK_SD_DEV_IDX_S2D4,
47     CLOCK_SD_DEV_IDX_S3D1,
48     CLOCK_SD_DEV_IDX_S3D2,
49     CLOCK_SD_DEV_IDX_S3D4,
50     CLOCK_SD_DEV_IDX_SD0,
51     CLOCK_SD_DEV_IDX_SD1,
52     CLOCK_SD_DEV_IDX_SD2,
53     CLOCK_SD_DEV_IDX_SD3,
54     CLOCK_SD_DEV_IDX_CL,
55     CLOCK_SD_DEV_IDX_CR,
56     CLOCK_SD_DEV_IDX_CP,
57     CLOCK_SD_DEV_IDX_CPEX,
58     CLOCK_SD_DEV_IDX_CANFD,
59     CLOCK_SD_DEV_IDX_CSI0,
60     CLOCK_SD_DEV_IDX_MSO,
61     CLOCK_SD_DEV_IDX_HDMI,
62     CLOCK_SD_DEV_IDX_OSC,
63     CLOCK_SD_DEV_IDX_R,
64     CLOCK_SD_DEV_IDX_S0,
65     CLOCK_SD_DEV_IDX_S1,
66     CLOCK_SD_DEV_IDX_S2,
67     CLOCK_SD_DEV_IDX_S3,
68     CLOCK_SD_DEV_IDX_SDSRC,
69     CLOCK_SD_DEV_IDX_RINT,
70     CLOCK_SD_DEV_IDX_COUNT
71 };
72 
73 #define CLK_ID_SD_START CLOCK_SD_DEV_IDX_ZTR
74 #define CLK_ID_SD_END CLOCK_SD_DEV_IDX_COUNT
75 
76 #endif /* CLOCK_SD_DEVICES_H */
77