1 /*
2 * Renesas SCP/MCP Software
3 * Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #include <clock_ext_devices.h>
9 #include <system_clock.h>
10
11 #include <mod_rcar_ext_clock.h>
12 #include <mod_clock.h>
13
14 #include <fwk_element.h>
15 #include <fwk_id.h>
16 #include <fwk_macros.h>
17 #include <fwk_module.h>
18
19 static const struct fwk_element rcar_ext_clock_element_table[] = {
20 {
21 .name = "x12_clk",
22 .data = &((struct mod_rcar_ext_clock_dev_config) {
23 .clock_rate = 24576000,
24 .clock_state = MOD_CLOCK_STATE_RUNNING,
25 }),
26 },
27 {
28 .name = "x21_clk",
29 .data = &((struct mod_rcar_ext_clock_dev_config) {
30 .clock_rate = 33000000,
31 .clock_state = MOD_CLOCK_STATE_RUNNING,
32 }),
33 },
34 {
35 .name = "x22_clk",
36 .data = &((struct mod_rcar_ext_clock_dev_config) {
37 .clock_rate = 33000000,
38 .clock_state = MOD_CLOCK_STATE_RUNNING,
39 }),
40 },
41 {
42 .name = "x23_clk",
43 .data = &((struct mod_rcar_ext_clock_dev_config) {
44 .clock_rate = 25000000,
45 .clock_state = MOD_CLOCK_STATE_RUNNING,
46 }),
47 },
48 {
49 .name = "audio_clkout",
50 .data = &((struct mod_rcar_ext_clock_dev_config) {
51 .clock_rate = 12288000,
52 .clock_state = MOD_CLOCK_STATE_RUNNING,
53 }),
54 },
55 {
56 .name = "audio_clk_a",
57 .data = &((struct mod_rcar_ext_clock_dev_config) {
58 .clock_rate = 22579200,
59 .clock_state = MOD_CLOCK_STATE_RUNNING,
60 }),
61 },
62 {
63 .name = "audio_clk_c",
64 .data = &((struct mod_rcar_ext_clock_dev_config) {
65 .clock_rate = 0,
66 .clock_state = MOD_CLOCK_STATE_RUNNING,
67 }),
68 },
69 {
70 .name = "can_clk",
71 .data = &((struct mod_rcar_ext_clock_dev_config) {
72 .clock_rate = 0,
73 .clock_state = MOD_CLOCK_STATE_RUNNING,
74 }),
75 },
76 {
77 .name = "pcie_bus_clk",
78 .data = &((struct mod_rcar_ext_clock_dev_config) {
79 .clock_rate = 100000000,
80 .clock_state = MOD_CLOCK_STATE_RUNNING,
81 }),
82 },
83 {
84 .name = "scif_clk",
85 .data = &((struct mod_rcar_ext_clock_dev_config) {
86 .clock_rate = 14745600,
87 .clock_state = MOD_CLOCK_STATE_RUNNING,
88 }),
89 },
90 {
91 .name = "usb3s0_clk",
92 .data = &((struct mod_rcar_ext_clock_dev_config) {
93 .clock_rate = 100000000,
94 .clock_state = MOD_CLOCK_STATE_RUNNING,
95 }),
96 },
97 {
98 .name = "usb_extal_clk",
99 .data = &((struct mod_rcar_ext_clock_dev_config) {
100 .clock_rate = 50000000,
101 .clock_state = MOD_CLOCK_STATE_RUNNING,
102 }),
103 },
104 { 0 }, /* Termination description. */
105 };
106
rcar_ext_clock_get_element_table(fwk_id_t module_id)107 static const struct fwk_element *rcar_ext_clock_get_element_table
108 (fwk_id_t module_id)
109 {
110 return rcar_ext_clock_element_table;
111 }
112
113 struct fwk_module_config config_rcar_ext_clock = {
114 .elements = FWK_MODULE_DYNAMIC_ELEMENTS(rcar_ext_clock_get_element_table),
115 };
116