1 /*
2 * Renesas SCP/MCP Software
3 * Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights
4 * reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #include <config_rcar_pd_sysc.h>
10 #include <config_power_domain.h>
11
12 #include <mod_rcar_pd_sysc.h>
13
14 #include <fwk_element.h>
15 #include <fwk_module.h>
16
17 static struct fwk_element rcar_pd_sysc_element_table[] = {
18 [RCAR_PD_SYSC_ELEMENT_IDX_A3IR] =
19 {
20 .name = "a3ir",
21 .data = &((struct mod_rcar_pd_sysc_config){
22 .pd_type = RCAR_PD_TYPE_DEVICE,
23 .chan_offs = 0x180,
24 .chan_bit = 0,
25 .isr_bit = R8A7795_PD_A3IR,
26 .always_on = false,
27 }),
28 },
29 [RCAR_PD_SYSC_ELEMENT_IDX_3DGE] =
30 {
31 .name = "3dg-e",
32 .data = &((struct mod_rcar_pd_sysc_config){
33 .pd_type = RCAR_PD_TYPE_DEVICE,
34 .chan_offs = 0x100,
35 .chan_bit = 4,
36 .isr_bit = R8A7795_PD_3DG_E,
37 .always_on = false,
38 }),
39 },
40 [RCAR_PD_SYSC_ELEMENT_IDX_3DGD] =
41 {
42 .name = "3dg-d",
43 .data = &((struct mod_rcar_pd_sysc_config){
44 .pd_type = RCAR_PD_TYPE_DEVICE,
45 .chan_offs = 0x100,
46 .chan_bit = 3,
47 .isr_bit = R8A7795_PD_3DG_D,
48 .always_on = false,
49 }),
50 },
51 [RCAR_PD_SYSC_ELEMENT_IDX_3DGC] =
52 {
53 .name = "3dg-c",
54 .data = &((struct mod_rcar_pd_sysc_config){
55 .pd_type = RCAR_PD_TYPE_DEVICE,
56 .chan_offs = 0x100,
57 .chan_bit = 2,
58 .isr_bit = R8A7795_PD_3DG_C,
59 .always_on = false,
60 }),
61 },
62 [RCAR_PD_SYSC_ELEMENT_IDX_3DGB] =
63 {
64 .name = "3dg-b",
65 .data = &((struct mod_rcar_pd_sysc_config){
66 .pd_type = RCAR_PD_TYPE_DEVICE,
67 .chan_offs = 0x100,
68 .chan_bit = 1,
69 .isr_bit = R8A7795_PD_3DG_B,
70 .always_on = false,
71 }),
72 },
73 [RCAR_PD_SYSC_ELEMENT_IDX_3DGA] =
74 {
75 .name = "3dg-a",
76 .data = &((struct mod_rcar_pd_sysc_config){
77 .pd_type = RCAR_PD_TYPE_DEVICE,
78 .chan_offs = 0x100,
79 .chan_bit = 0,
80 .isr_bit = R8A7795_PD_3DG_A,
81 .always_on = false,
82 }),
83 },
84 [RCAR_PD_SYSC_ELEMENT_IDX_A2VC1] =
85 {
86 .name = "a2vc1",
87 .data = &((struct mod_rcar_pd_sysc_config){
88 .pd_type = RCAR_PD_TYPE_DEVICE,
89 .chan_offs = 0x3c0,
90 .chan_bit = 1,
91 .isr_bit = R8A7795_PD_A2VC1,
92 .always_on = false,
93 }),
94 },
95 [RCAR_PD_SYSC_ELEMENT_IDX_A3VC] =
96 {
97 .name = "a3vc",
98 .data = &((struct mod_rcar_pd_sysc_config){
99 .pd_type = RCAR_PD_TYPE_DEVICE,
100 .chan_offs = 0x380,
101 .chan_bit = 0,
102 .isr_bit = R8A7795_PD_A3VC,
103 .always_on = true,
104 }),
105 },
106 [RCAR_PD_SYSC_ELEMENT_IDX_CR7] =
107 {
108 .name = "cr7",
109 .data = &((struct mod_rcar_pd_sysc_config){
110 .pd_type = RCAR_PD_TYPE_DEVICE,
111 .chan_offs = 0x240,
112 .chan_bit = 0,
113 .isr_bit = R8A7795_PD_CR7,
114 .always_on = false,
115 }),
116 },
117 [RCAR_PD_SYSC_ELEMENT_IDX_A3VP] =
118 {
119 .name = "a3vp",
120 .data = &((struct mod_rcar_pd_sysc_config){
121 .pd_type = RCAR_PD_TYPE_DEVICE,
122 .chan_offs = 0x340,
123 .chan_bit = 0,
124 .isr_bit = R8A7795_PD_A3VP,
125 .always_on = true,
126 }),
127 },
128 [RCAR_PD_SYSC_ELEMENT_IDX_ALWAYS_ON] =
129 {
130 .name = "always_on",
131 .data = &((struct mod_rcar_pd_sysc_config) {
132 .pd_type = RCAR_PD_TYPE_ALWAYS_ON,
133 .always_on = true,
134 }),
135 },
136 [RCAR_PD_SYSC_ELEMENT_IDX_COUNT] = { 0 }, /* Termination entry */
137 };
138
rcar_pd_sysc_get_element_table(fwk_id_t mod)139 static const struct fwk_element *rcar_pd_sysc_get_element_table(fwk_id_t mod)
140 {
141 return rcar_pd_sysc_element_table;
142 }
143
144 /*
145 * Power module configuration data
146 */
147 const struct fwk_module_config config_rcar_pd_sysc = {
148 .elements = FWK_MODULE_DYNAMIC_ELEMENTS(rcar_pd_sysc_get_element_table),
149 };
150