1 /*
2 * Arm SCP/MCP Software
3 * Copyright (c) 2020-2021, Arm Limited and Contributors. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #include "clock_soc.h"
9 #include "config_power_domain.h"
10 #include "platform_core.h"
11
12 #include <mod_clock.h>
13 #include <mod_css_clock.h>
14 #include <mod_pik_clock.h>
15 #include <mod_power_domain.h>
16
17 #include <fwk_element.h>
18 #include <fwk_id.h>
19 #include <fwk_module.h>
20 #include <fwk_module_idx.h>
21
22 #define CLOCK_CPU_GROUP(n) \
23 [CLOCK_IDX_CPU_GROUP##n] = { \
24 .name = "CPU_GROUP" #n, \
25 .data = &((struct mod_clock_dev_config){ \
26 .driver_id = FWK_ID_ELEMENT_INIT( \
27 FWK_MODULE_IDX_CSS_CLOCK, CLOCK_CSS_IDX_CPU_GROUP##n), \
28 .api_id = FWK_ID_API_INIT( \
29 FWK_MODULE_IDX_CSS_CLOCK, MOD_CSS_CLOCK_API_TYPE_CLOCK), \
30 }), \
31 }
32
33 static const struct fwk_element clock_dev_desc_table[] = {
34 [CLOCK_IDX_INTERCONNECT] = {
35 .name = "Interconnect",
36 .data = &((struct mod_clock_dev_config) {
37 .driver_id = FWK_ID_ELEMENT_INIT(FWK_MODULE_IDX_PIK_CLOCK,
38 CLOCK_PIK_IDX_INTERCONNECT),
39 .api_id = FWK_ID_API_INIT(FWK_MODULE_IDX_PIK_CLOCK,
40 MOD_PIK_CLOCK_API_TYPE_CLOCK),
41 }),
42 },
43 CLOCK_CPU_GROUP(0),
44 CLOCK_CPU_GROUP(1),
45 CLOCK_CPU_GROUP(2),
46 CLOCK_CPU_GROUP(3),
47 CLOCK_CPU_GROUP(4),
48 CLOCK_CPU_GROUP(5),
49 CLOCK_CPU_GROUP(6),
50 CLOCK_CPU_GROUP(7),
51 CLOCK_CPU_GROUP(8),
52 CLOCK_CPU_GROUP(9),
53 CLOCK_CPU_GROUP(10),
54 CLOCK_CPU_GROUP(11),
55 CLOCK_CPU_GROUP(12),
56 CLOCK_CPU_GROUP(13),
57 CLOCK_CPU_GROUP(14),
58 CLOCK_CPU_GROUP(15),
59 { 0 }, /* Termination description. */
60 };
61
clock_get_dev_desc_table(fwk_id_t module_id)62 static const struct fwk_element *clock_get_dev_desc_table(fwk_id_t module_id)
63 {
64 unsigned int i;
65 struct mod_clock_dev_config *dev_config;
66
67 for (i = 0; i < CLOCK_IDX_COUNT; i++) {
68 dev_config =
69 (struct mod_clock_dev_config *)clock_dev_desc_table[i].data;
70 dev_config->pd_source_id = fwk_id_build_element_id(
71 fwk_module_id_power_domain,
72 platform_core_get_core_count() + platform_core_get_cluster_count() +
73 PD_STATIC_DEV_IDX_SYSTOP);
74 }
75
76 return clock_dev_desc_table;
77 }
78
79 const struct fwk_module_config config_clock = {
80 .data =
81 &(struct mod_clock_config){
82 .pd_transition_notification_id = FWK_ID_NOTIFICATION_INIT(
83 FWK_MODULE_IDX_POWER_DOMAIN,
84 MOD_PD_NOTIFICATION_IDX_POWER_STATE_TRANSITION),
85 .pd_pre_transition_notification_id = FWK_ID_NOTIFICATION_INIT(
86 FWK_MODULE_IDX_POWER_DOMAIN,
87 MOD_PD_NOTIFICATION_IDX_POWER_STATE_PRE_TRANSITION),
88 },
89
90 .elements = FWK_MODULE_DYNAMIC_ELEMENTS(clock_get_dev_desc_table),
91 };
92