1 /*
2  * Arm SCP/MCP Software
3  * Copyright (c) 2020-2021, Arm Limited and Contributors. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include "clock_soc.h"
9 #include "scp_css_mmap.h"
10 
11 #include <mod_cmn650.h>
12 
13 #include <fwk_id.h>
14 #include <fwk_macros.h>
15 #include <fwk_module.h>
16 #include <fwk_module_idx.h>
17 
18 #include <stdbool.h>
19 #include <stddef.h>
20 #include <stdint.h>
21 
22 /*
23  * CMN650 nodes
24  */
25 #define MEM_CNTRL0_ID 12
26 #define MEM_CNTRL1_ID 136
27 #define MEM_CNTRL2_ID 28
28 #define MEM_CNTRL3_ID 152
29 #define NODE_ID_HND   4
30 #define NODE_ID_SBSX  0
31 
32 static const unsigned int snf_table[] = {
33     MEM_CNTRL0_ID, /* Maps to HN-F logical node 0  */
34     MEM_CNTRL0_ID, /* Maps to HN-F logical node 1  */
35     MEM_CNTRL0_ID, /* Maps to HN-F logical node 2  */
36     MEM_CNTRL0_ID, /* Maps to HN-F logical node 3  */
37     MEM_CNTRL1_ID, /* Maps to HN-F logical node 4  */
38     MEM_CNTRL1_ID, /* Maps to HN-F logical node 5  */
39     MEM_CNTRL1_ID, /* Maps to HN-F logical node 6  */
40     MEM_CNTRL1_ID, /* Maps to HN-F logical node 7  */
41     MEM_CNTRL2_ID, /* Maps to HN-F logical node 8  */
42     MEM_CNTRL2_ID, /* Maps to HN-F logical node 9  */
43     MEM_CNTRL2_ID, /* Maps to HN-F logical node 10 */
44     MEM_CNTRL2_ID, /* Maps to HN-F logical node 11 */
45     MEM_CNTRL3_ID, /* Maps to HN-F logical node 12 */
46     MEM_CNTRL3_ID, /* Maps to HN-F logical node 13 */
47     MEM_CNTRL3_ID, /* Maps to HN-F logical node 14 */
48     MEM_CNTRL3_ID, /* Maps to HN-F logical node 15 */
49 };
50 
51 static const struct mod_cmn650_mem_region_map mmap[] = {
52     {
53         /*
54          * System cache backed region
55          * Map: 0x0000_0000_0000 - 0x003F_FFFFF_FFFF (4 TB)
56          */
57         .base = UINT64_C(0x000000000000),
58         .size = UINT64_C(4) * FWK_TIB,
59         .type = MOD_CMN650_MEM_REGION_TYPE_SYSCACHE,
60     },
61     {
62         /*
63          * Boot region
64          * Map: 0x0000_0000_0000 - 0x0000_0001_FFFF (128 MB)
65          */
66         .base = UINT64_C(0x000000000000),
67         .size = UINT64_C(128) * FWK_MIB,
68         .type = MOD_CMN650_REGION_TYPE_SYSCACHE_SUB,
69         .node_id = NODE_ID_SBSX,
70     },
71     {
72         /*
73          * NOR Flash
74          * Map: 0x00_0800_0000 - 0x00_0FFF_FFFF (128 MB)
75          */
76         .base = UINT64_C(0x0008000000),
77         .size = UINT64_C(128) * FWK_MIB,
78         .type = MOD_CMN650_MEM_REGION_TYPE_IO,
79         .node_id = NODE_ID_HND,
80     },
81     {
82         /*
83          * Peripherals
84          * Map: 0x00_1000_0000 - 0x00_1FFF_FFFF (256 MB)
85          */
86         .base = UINT64_C(0x0010000000),
87         .size = UINT64_C(256) * FWK_MIB,
88         .type = MOD_CMN650_MEM_REGION_TYPE_IO,
89         .node_id = NODE_ID_HND,
90     },
91     {
92         /*
93          * Peripherals
94          * Map: 0x00_2000_0000 - 0x00_3FFF_FFFF (512 MB)
95          */
96         .base = UINT64_C(0x0020000000),
97         .size = UINT64_C(512) * FWK_MIB,
98         .type = MOD_CMN650_MEM_REGION_TYPE_IO,
99         .node_id = NODE_ID_HND,
100     },
101     {
102         /*
103          * Peripherals
104          * Map: 0x00_4000_0000 - 0x00_7FFF_FFFF (1 GB)
105          */
106         .base = UINT64_C(0x0040000000),
107         .size = UINT64_C(1) * FWK_GIB,
108         .type = MOD_CMN650_MEM_REGION_TYPE_IO,
109         .node_id = NODE_ID_HND,
110     },
111     {
112         /*
113          * 64-bit PCIe MMIO region
114          * Map: 0x05_0000_0000 - 0x05_FFFF_FFFF (4 GB)
115          */
116         .base = UINT64_C(0x0500000000),
117         .size = UINT64_C(4) * FWK_GIB,
118         .type = MOD_CMN650_MEM_REGION_TYPE_IO,
119         .node_id = NODE_ID_HND,
120     },
121 };
122 
123 static const struct fwk_element cmn650_device_table[] = {
124     [0] = {
125         .name = "Chip-0 CMN-650 Mesh Config",
126         .data = &((struct mod_cmn650_config){
127                 .base = SCP_CMN650_BASE,
128                 .mesh_size_x = 3,
129                 .mesh_size_y = 5,
130                 .hnd_node_id = NODE_ID_HND,
131                 .snf_table = snf_table,
132                 .snf_count = FWK_ARRAY_SIZE(snf_table),
133                 .mmap_table = mmap,
134                 .mmap_count = FWK_ARRAY_SIZE(mmap),
135                 .chip_addr_space = UINT64_C(4) * FWK_TIB,
136                 .clock_id = FWK_ID_ELEMENT_INIT(FWK_MODULE_IDX_CLOCK,
137                     CLOCK_IDX_INTERCONNECT),
138                 .hnf_cal_mode = true,
139             }),
140     },
141     [1] = { 0 }
142 };
143 
cmn650_get_device_table(fwk_id_t module_id)144 static const struct fwk_element *cmn650_get_device_table(fwk_id_t module_id)
145 {
146     return cmn650_device_table;
147 }
148 
149 const struct fwk_module_config config_cmn650 = {
150     .elements = FWK_MODULE_DYNAMIC_ELEMENTS(cmn650_get_device_table),
151 };
152