1 /*
2  * Arm SCP/MCP Software
3  * Copyright (c) 2017-2021, Arm Limited and Contributors. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #ifndef SGM776_PIK_DPU_H
9 #define SGM776_PIK_DPU_H
10 
11 #include <fwk_macros.h>
12 
13 #include <stdint.h>
14 
15 /*!
16  * \brief DPU PIK register definitions
17  */
18 struct pik_dpu_reg {
19     FWK_R   uint8_t  RESERVED0[0x830];
20     FWK_RW  uint32_t ACLKDP_CTRL;
21     FWK_RW  uint32_t ACLKDP_DIV1;
22     FWK_RW  uint32_t ACLKDP_DIV2;
23             uint8_t  RESERVED3[0xA00 - 0x83C];
24     FWK_R   uint32_t CLKFORCE_STATUS;
25     FWK_W   uint32_t CLKFORCE_SET;
26     FWK_W   uint32_t CLKFORCE_CLR;
27             uint8_t  RESERVED4[0xFC0 - 0xA0C];
28     FWK_RW  uint32_t PCL_CONFIG;
29             uint8_t  RESERVED5[0xFD0 - 0xFC4];
30     FWK_R   uint32_t PID4;
31     FWK_R   uint32_t PID5;
32     FWK_R   uint32_t PID6;
33     FWK_R   uint32_t PID7;
34     FWK_R   uint32_t PID0;
35     FWK_R   uint32_t PID1;
36     FWK_R   uint32_t PID2;
37     FWK_R   uint32_t PID3;
38     FWK_R   uint32_t ID0;
39     FWK_R   uint32_t ID1;
40     FWK_R   uint32_t ID2;
41     FWK_R   uint32_t ID3;
42 };
43 
44 #endif  /* SGM776_PIK_DPU_H */
45