1 /*
2 * Arm SCP/MCP Software
3 * Copyright (c) 2015-2021, Arm Limited and Contributors. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #include "sgm776_pik.h"
9 #include "sgm776_pik_scp.h"
10 #include "system_mmap.h"
11
12 #include <mod_system_pll.h>
13
14 #include <fwk_element.h>
15 #include <fwk_id.h>
16 #include <fwk_macros.h>
17 #include <fwk_module.h>
18
19 #include <stdbool.h>
20
21 static const struct fwk_element system_pll_element_table[] = {
22 {
23 .name = "CPU_PLL_0",
24 .data = &((struct mod_system_pll_dev_config) {
25 .control_reg = (void *)PLL_CLUS0_0,
26 .status_reg = (void *)&PIK_SCP->PLL_STATUS1,
27 .lock_flag_mask = PLL_STATUS1_CPUPLLLOCK(0, 0),
28 .initial_rate = 2700 * FWK_MHZ,
29 .min_rate = MOD_SYSTEM_PLL_MIN_RATE,
30 .max_rate = MOD_SYSTEM_PLL_MAX_RATE,
31 .min_step = MOD_SYSTEM_PLL_MIN_INTERVAL,
32 .defer_initialization = false,
33 }),
34 },
35 {
36 .name = "CPU_PLL_1",
37 .data = &((struct mod_system_pll_dev_config) {
38 .control_reg = (void *)PLL_CLUS0_1,
39 .status_reg = (void *)&PIK_SCP->PLL_STATUS1,
40 .lock_flag_mask = PLL_STATUS1_CPUPLLLOCK(0, 1),
41 .initial_rate = 2200 * FWK_MHZ,
42 .min_rate = MOD_SYSTEM_PLL_MIN_RATE,
43 .max_rate = MOD_SYSTEM_PLL_MAX_RATE,
44 .min_step = MOD_SYSTEM_PLL_MIN_INTERVAL,
45 .defer_initialization = false,
46 }),
47 },
48 {
49 .name = "GPU_PLL",
50 .data = &((struct mod_system_pll_dev_config) {
51 .control_reg = (void *)PLL_GPU,
52 .status_reg = (void *)&PIK_SCP->PLL_STATUS0,
53 .lock_flag_mask = PLL_STATUS0_GPUPLLLOCK,
54 .initial_rate = 800 * FWK_MHZ,
55 .min_rate = MOD_SYSTEM_PLL_MIN_RATE,
56 .max_rate = MOD_SYSTEM_PLL_MAX_RATE,
57 .min_step = MOD_SYSTEM_PLL_MIN_INTERVAL,
58 .defer_initialization = false,
59 }),
60 },
61 {
62 .name = "SYS_PLL",
63 .data = &((struct mod_system_pll_dev_config) {
64 .control_reg = (void *)PLL_SYSTEM,
65 .status_reg = (void *)&PIK_SCP->PLL_STATUS0,
66 .lock_flag_mask = PLL_STATUS0_SYSPLLLOCK,
67 .initial_rate = 3600 * FWK_MHZ,
68 .min_rate = MOD_SYSTEM_PLL_MIN_RATE,
69 .max_rate = MOD_SYSTEM_PLL_MAX_RATE,
70 .min_step = MOD_SYSTEM_PLL_MIN_INTERVAL,
71 .defer_initialization = false,
72 }),
73 },
74 { 0 }, /* Termination description. */
75 };
76
system_pll_get_element_table(fwk_id_t module_id)77 static const struct fwk_element *system_pll_get_element_table
78 (fwk_id_t module_id)
79 {
80 return system_pll_element_table;
81 }
82
83 const struct fwk_module_config config_system_pll = {
84 .elements = FWK_MODULE_DYNAMIC_ELEMENTS(system_pll_get_element_table),
85 };
86